WI.232FHSS-250-R Radiotronix, WI.232FHSS-250-R Datasheet - Page 49

• Manufacturer Part Number: WI.232FHSS-250-R
• Description: RF Modules & Development Tools 900MHz FHSS Low
• Manufacturer: Radiotronix

Specifications of WI.232FHSS-250-R

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: WI232FHSS-250-R

WI.232FHSS-25-R/ WI.232FHSS-250-R DATASHEET
Default Compatibility Mode: Disabled (0x00)
The Wi.232FHSS-250-R operates at a much narrower receive bandwidth (200kHz) than the Wi.232FHSS-
25 (600kHz). When the Wi.232FHSS-25 transmits, it deviates well outside the receiver bandwidth of the
Wi.232FHSS-250-R. To address this problem, v1.0.5 and later Wi.232FHSS-25 firmware and all
Wi.232FHSS-250-Rs support a compatibility mode. This allows both modules to communicate effectively
with each other.
When enabled (0x01), compatibility mode reduces the maximum RF data rate to 76.8kbps, reduces the
Wi.232FHSS-25’s deviation to 80kHz, and reduces the Wi.232FHSS-25’s receiving bandwidth to 200kHz.
All UART baud rates are supported, although the RF data rates associated with baud rates 31250, 38400,
57600, and 115200 will be diminished.
Default Auto Address Mode: Disabled (0x00)
When this register is enabled, the Wi.232FHSS-250-R module reads the Source Address from an incoming
packet and auto-populates this information into the respective Destination Address register. This ensures
that a subsequent transmission is sent only to the relevant module, in a point-to-point configuration.
The upper 4 bits of the volatile register contains the last-received packet type. The values of these four
bits are the same as the mode settings below. For instance, set regAUTADDMODE to 0x0F (Any Auto
Address), and then receive a MAC packet from another module. When you read back the
regAUTADDMODE register, the register value will be 0x4F. The lower 4-bits indicate the setting of the
register (0xF, Any Auto Address), and the upper 4 bits indicate the type of packet that was received (0x4,
MAC Address).
The table below summarizes the allowed values for the lower 4-bits of the register. The lower 4-bits
contain the value that controls the operation of this feature. The upper 4-bits are not read by the module
and are only written upon a successful packet reception:
R/W
D7
7
R/W
D7
7
4.1.33. Compatibility Mode (regCOMPATMODE)
4.1.34. Auto Address Mode (regAUTADDMODE)
regNVCOMPATMODE (0x25)
regNVAUTADDMODE (0x26)
R/W
D6
6
R/W
D6
6
R/W
D5
5
R/W
D5
5
R/W
D4
4
R/W
D4
4
48
D3
3
D3
3
R/W
R/W
R/W
D2
2
R/W
D2
2
regCOMPATMODE (0x70)
regAUTADDMODE (0x71)
R/W
D1
1
R/W
D1
1
Revision 1.1.0
R/W
D0
0
R/W
D0
0