LRI64-SBN18/1GE STMicroelectronics, LRI64-SBN18/1GE Datasheet - Page 18

• Manufacturer Part Number: LRI64-SBN18/1GE
• Description: IC EEPROM MEMORY TAG WAFER
• Manufacturer: STMicroelectronics
• Series: LRI64r

Specifications of LRI64-SBN18/1GE

• Rf Type: Write Once Read Many (WORM)
• Frequency: 13.56MHz
• Features: ISO15693, ISO18000-3
• Package / Case: Wafer
• For Use With: 497-5538 - DEMO KIT LONG-RANGE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Special fields
10.2
10.3
10.4
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Application family identifier (AFI)
The application family identifier (AFI) indicates the type of application targeted by the VCD,
and is used to select only those LRI64 devices meeting the required application criteria (as
summarized in
Once programmed, it cannot be modified.
The most significant nibble of the AFI is used to indicate one specific application, or all
families. The least significant nibble of the AFI is used to code one specific subfamilies, or all
subfamilies. Subfamily codes, other than 0, are proprietary (as described in ISO 15693 and
ISO 18000-3 Mode 1 documentation).
Data storage format identifier (DSFID)
The data storage format identifier (DSFID) indicates how the data is structured in the LRI64
memory. It is coded on one byte. It allows for quick and brief knowledge on the logical
organization of the data. It is programmed by the LRI64 issuer in the DSFID register. Once
programmed, it cannot be modified.
Cyclic redundancy code (CRC)
The cyclic redundancy code (CRC) is calculated as defined in ISO/IEC 13239, starting from
an initial register content of all ones: FFFFh.
The 2-byte CRC is appended to each request and each response, within each frame, before
the EOF. The CRC is calculated on all the bytes after the SOF, up to the CRC field.
Upon reception of a request from the VCD, the LRI64 verifies that the CRC value is valid. If
it is invalid, it discards the frame, and does not answer the VCD.
Upon reception of a response from the LRI64, it is recommended that the VCD verify that
the CRC value is valid. If it is invalid, the actions that need to be performed are up to the
VCD designer.
The CRC is transmitted least significant byte first. Each byte is transmitted Least Significant
Bit first, as shown in
Figure 15. CRC format
Figure
Figure
14). The value is programmed by the LRI64 issuer in the AFI register.
15).
Least Significant Byte
l.s.bit
m.s.bit
Most Significant Byte
l.s.bit
m.s.bit
AI09726
LRI64