LRI64-A1S STMICROELECTRONICS [STMicroelectronics], LRI64-A1S Datasheet

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LRI64-A1S

Manufacturer Part Number
LRI64-A1S
Description
Memory TAG IC, 64-bit Unique ID with WORM User Area 13.56MHz, ISO15693 and ISO18000-3 Mode 1 Compliant
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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LRI64-A1S/1GE
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FEATURES SUMMARY
September 2005
ISO 15693 Compliant
ISO 18000-3 Mode 1 Compliant
13.56MHz ±7kHz Carrier Frequency
Supported data transfer to the LRI64:
10% ASK modulation using “1-out-of-4” pulse
position coding (26 kbit/s)
Supported data transfer from the LRI64:
Load modulation using Manchester coding
with 423kHz single sub-carrier in fast data rate
(26 kbit/s)
Internal Tuning Capacitor
7 x 8 bits WORM User Area
64-bit Unique Identifier (UID)
Read Block and Write Block Commands (8-bit
blocks)
7ms Programming Time (typical)
More than 40-Year Data Retention
Electrical Article Surveillance capable
(software controlled)
13.56MHz, ISO15693 and ISO18000-3 Mode 1 Compliant
Memory TAG IC, 64-bit Unique ID with WORM User Area
Figure 1. Delivery Forms
UFDFPN8 (MB)
Antenna (A7)
2x3mm² (MLP)
Antenna (A6)
Antenna (A1)
LRI64
Wafer
1/38

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LRI64-A1S Summary of contents

Page 1

... ISO15693 and ISO18000-3 Mode 1 Compliant FEATURES SUMMARY ISO 15693 Compliant ISO 18000-3 Mode 1 Compliant 13.56MHz ±7kHz Carrier Frequency Supported data transfer to the LRI64: 10% ASK modulation using “1-out-of-4” pulse position coding (26 kbit/s) Supported data transfer from the LRI64: Load modulation using Manchester coding ...

Page 2

... POWER TRANSFER Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Operating Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 COMMUNICATION SIGNAL FROM VCD TO LRI64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 DATA RATE AND DATA CODING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 VCD TO LRI64 FRAMES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 COMMUNICATIONS SIGNAL FROM LRI64 TO VCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Load Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Subcarrier Data Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Bit Representation and Coding using One Subcarrier, at the High Data Rate . . . . . . . . . . . . 10 Logic Logic 1 ...

Page 3

... Inventory Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 REQUEST PROCESSING BY THE LRI64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Explanation of the Possible Cases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 TIMING DEFINITIONS LRI64 Response Delay VCD New Request Delay VCD New Request Delay when there is No LRI64 Response COMMANDS CODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Inventory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Stay Quiet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Read Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Write Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Get System Info ...

Page 4

... LRI64 APPENDIX B.C-EXAMPLE TO CALCULATE OR CHECK THE CRC16 ACCORDING TO ISO/IEC 13239 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 CRC Calculation Example APPENDIX C.APPLICATION FAMILY IDENTIFIER (AFI) CODING . . . . . . . . . . . . . . . . . . . . . . . . . . 36 REVISION HISTORY 4/38 ...

Page 5

... AC1 AC0 Block AI08590 Addr The LRI64 uses the first 8 blocks (blocks store the 64-bit Unique Identifier (UID). The UID is used during the anti-collision sequence (Invento- ry written, by ST, at time of manufacture, but part of it can be customer-accessible and custom- er-writable, on special request. ...

Page 6

... The LRI64 answers to the Inventory com- mand when all of the 64 bits of the UID have been correctly written. Stay Quiet. Used to put the LRI64 in Quiet mode. In this mode, the LRI64 only responds to com- mands in Addressed mode. Read Block. Used to output the 8 bits of the se- lected block ...

Page 7

... ISO 15693 and ISO 18000-3 Mode 1 standards. Any request that the VCD might send using the 100% modulation mode, is ignored, and the LRI64 remains in its current state. However, the LRI64 is, in fact, operational for any degree of modulation index from between 10% and 30%. Figure 5. 10% Modulation Waveform ...

Page 8

... The LRI64 supports the “1-out-of-4” pulse coding mode. Any request that the VCD might send in the “1-out-of-256” pulse coded mode, is ignored, and the LRI64 remains in its cur- rent state. Two bit values are encoded at a time, by the posi- tioning of a pause of the carrier frequency in one of four possible 18.88µ ...

Page 9

... The LRI64 generates a Power On delay of t (see Table 14.) after being activated by the power- ing field. After this delay, the LRI64 is ready to re- ceive a command frame from the VCD. Figure 8. Request SOF, using the “1-out-of-4” Data Coding Mode 9.44 µs 37.76 µs Figure 9 ...

Page 10

... S tion is 423.75kHz (=f /32). C Data Rate The LRI64 response uses the high data rate for- mat (26.48 kbits/s). The selection of the data rate is made by the VCD using the second bit in the protocol header. Bit Representation and Coding using One Subcarrier, at the High Data Rate ...

Page 11

... Response Frames are delimited by a Start of Frame (SOF) and an End of Frame (EOF) and are implemented using a code violation mechanism. The LRI64 supports these in the one subcarrier mode, at the fast data rate, only. The VCD is ready to receive a response frame from the LRI64 before 320.9µs (t sent a command frame ...

Page 12

... EOF. The CRC is calculated on all the bytes after the SOF the CRC field. Upon reception of a Request from the VCD, the LRI64 verifies that the CRC value is valid in- valid, it discards the frame, and does not answer the VCD. ...

Page 13

... The Transmission protocol defines the mecha- nism to exchange instructions and data between the VCD and the LRI64, in each direction. Based on “VCD talks first”, the LRI64 does not start trans- mitting unless it has received and properly decod instruction sent by the VCD. ...

Page 14

... Transitions between these states are as specified in Figure 20. Power-off State The LRI64 is in the Power-off state when it re- ceives insufficient energy from the VCD. Ready State The LRI64 is in the Ready state when it receives enough energy from the VCD. It answers to any Request in Addressed and modes. ...

Page 15

... Flag bit 3 (the Inventory_flag) defines the way the four most significant flag bits ( are used. When bit 3 is reset (0), bits define the LRI64 selection criteria. When bit 3 is set (1), bits define the LRI64 Inventory parameters. ...

Page 16

... LRI64 ANTI-COLLISION The purpose of the anti-collision sequence is to al- low the VCD to compile a list of the LRI64 devices that are present in the VCD field, each one identi- fied by its unique ID (UID). The VCD is the master of the communication with one or multiple LRI64 devices. It initiates the com- ...

Page 17

... The VCD sends an Inventory Request frame, terminated by a EOF. The number of slots is 16. – LRI64 #1 transmits its Response in Slot the only one to do so, therefore no collision occurs and its UID is received and registered by the VCD; – The VCD sends an EOF, to switch to the next slot. – ...

Page 18

... LRI64 Figure 22. Description of a Possible Anti-collision Sequence between LRI64 Devices 18/38 ...

Page 19

... VCD New Request Delay when there is No LRI64 Response the time after which the VCD may send an 3 EOF to switch to the next slot when no LRI64 re- sponse has been received. . The EOF sent by the VCD is 10% modulated, in- C dependent of the modulation index used for trans- mitting the VCD request to the LRI64 ...

Page 20

... LRI64 COMMANDS CODES The LRI64 supports the command codes listed in Table 9. Table 9. Command Codes Command Code 01h 02h 20h Read Single Block 21h Write Single Block 2Bh Get System Info Figure 23. Inventory, Request Frame Format Request Request SOF Flags 8 bits Figure 24. Inventory, Response Frame Format ...

Page 21

... LRI64 does not process any Request in which the Inventory_flag is set Table 9.) – the LRI64 responds to commands in the Addressed mode if the UID matches The LRI64 exits the Quiet State when it is taken to the Power Off state Command UID Code 8 bits 64 bits ...

Page 22

... Figure 28. Read Single Block, Response Frame Format, when Error_Flag is not Set Response SOF Figure 29. Read Single Block, Response Frame Format, when Error_Flag is Set Figure 30. READ Single Block Frame Exchange between VCD and LRI64 Read Single VCD SOF Block Request VICC 22/38 – ...

Page 23

... VCD Block Request VICC VICC – Block Number – Data – 2-byte CRC If there is no error, at the LRI64, an empty Re- sponse Frame write cycle, containing no parameters. It just con- tains: – Response Flags – 2-byte CRC Otherwise, if there is an error, the Response Frame (Figure – ...

Page 24

... SOF Flags Flags 8 bits 8 bits 00h 0Fh Figure 37. Get System Info, Response Frame Format, when Error_Flag is Set Figure 38. Get System Info Frame Exchange between VCD and LRI64 Get System VCD SOF Info Request VICC 24/38 – Information Flags set to 0Fh, indicating the ...

Page 25

... Exposure to Absolute Maximum Rating con- ditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality docu- ments. Parameter Wafer A1, A6 A1, A6, A7 LRI64 Min. Max. Unit 15 25 °C 23 months kept in its antistatic bag ...

Page 26

... Table 12. Operating Conditions Symbol T Ambient Operating Temperature A Figure 39. LRI64 Synchronous Timing, Transmit and Receive t MIN CD Figure 39. shows an ASK modulated signal, from the VCD to the LRI64. The test condition for the AC/DC parameters are: Table 13. DC Characteristics Symbol Parameter V Regulated Voltage CC Retromodulated Induced ...

Page 27

... All timing measurements were performed on a reference antenna with the following characteristics: External size: 75mm x 48mm Number of turns: 6 Width of conductor: 1mm Space between 2 conductors: 0.4mm Value of the Tuning Capacitor: 28.5pF (LRI64-W4) Value of the coil: 4.3µH Tuning Frequency: 14.4MHz Min. Test Conditions 13 ...

Page 28

... LRI64 PACKAGE MECHANICAL Figure 40. A1 Antenna on Tape Outline C1 Note: Drawing is not to scale. Table 15. A1 Antenna on Tape Mechanical Data Symbol A1 Coil Width A2 Coil Length B1 Antenna Cut Width B2 Antenna Cut Length C1 Die Position from Antenna C2 Die Position from Antenna Silicon Thickness Q Unloaded Q value ...

Page 29

... Hole Diameter Overall Thickness of copper antenna coil Silicon Thickness Q Unloaded Q value F Unloaded free-air resonance NOM P H-field Energy for Device Operation A I Parameter A B Typ Min Max 35 34.5 35.5 40 38.8 40.2 16 15.8 16 180 165 195 35 15.1 0.5 114 LRI64 ai10120 Unit µm µm MHz A/m dbµA/m 29/38 ...

Page 30

... LRI64 Figure 42. A7 Antenna on Tape Outline Note: Drawing is not to scale. Table 17. A7 Antenna on Tape Mechanical Data Symbol A1 Coil Width A2 Coil Length B1 Antenna Cut Width B2 Antenna Cut Length C1 Die Position from Antenna C2 Die Position from Antenna Overall Thickness of copper antenna coil Silicon Thickness ...

Page 31

... ddd Millimeters Min. Max. 0.50 0.60 0.00 0.05 0.20 0.30 1.55 1.65 0.05 0.15 0.25 – – 0.40 0.50 0.15 0. UFDFPN-01 Inches Typ. Min. 0.022 0.020 0.000 0.010 0.008 0.079 0.061 0.118 0.006 0.020 – 0.018 0.016 0.012 8 LRI64 Max. 0.024 0.002 0.012 0.065 0.002 0.010 – 0.020 0.006 31/38 ...

Page 32

... Sb2O3-free and TBBA-free Customer Code XXX = Given by STMicroelectronics For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest ST Sales Office, or send your enquiries to the following e-mail address: mem- ories.contactless@st.com 32/38 LRI64 – XXX ...

Page 33

... Request mode = anti-collision send_Request (Request_cmd, mode, mask length, mask value) for sub_address = 0 to (2^sub_address_size - 1) pulse_next_pause if no_collision_is_detected ; LRI64 is inventoried then store (LRI64_UID) else ; remember a collision was detected push(mask,address) endif next sub_address if stack_not_empty ...

Page 34

... The Cyclic Redundancy Check (CRC) is calculat all data contained in a message, from the start of the Flags through to the end of Data. This CRC is used from VCD to LRI64 and from LRI64 to VCD. To add extra protection against shifting errors, a further transformation on the calculated CRC is made. The One’ ...

Page 35

... CRC is 0x%04X\n", current_crc_value); // current_crc_value is now ready to be appended to the data stream // (first LSByte, then MSByte) } else // check CRC { if (current_crc_value == CHECK_VALUE) { printf ("Checked CRC is ok (0x%04X)\n", current_crc_value); } else { printf ("Checked CRC is NOT ok (0x%04X)\n", current_crc_value LRI64 35/38 ...

Page 36

... VCD and is used to extract from all the LRI64 present only the LRI64 meeting the required application criteria programmed by the LRI64 issuer (the pur- chaser of the LRI64). Once locked, it can not be modified. Table 21. AFI Coding AFI AFI ...

Page 37

... Table 22. Document Revision History Date Rev. 27-Aug-2003 1.0 First Issue 16-Jul-2004 2.0 First public release of full datasheet Values changed for t 22-Sep-2004 3.0 11-Jul-2005 4.0 Added MLP package information. Modified Option_Flag information in 7-Sept-2005 5.0 1 compliance. Description of Revision , t and Get System Info command and added ISO 18000-3 Mode LRI64 37/38 ...

Page 38

... LRI64 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...

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