LRI64-SBN18/1GE STMicroelectronics, LRI64-SBN18/1GE Datasheet - Page 13
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LRI64-SBN18/1GE
Manufacturer Part Number
LRI64-SBN18/1GE
Description
IC EEPROM MEMORY TAG WAFER
Manufacturer
STMicroelectronics
Series
LRI64r
Datasheet
1.LRI64-W41GE.pdf
(49 pages)
Specifications of LRI64-SBN18/1GE
Rf Type
Write Once Read Many (WORM)
Frequency
13.56MHz
Features
ISO15693, ISO18000-3
Package / Case
Wafer
For Use With
497-5538 - DEMO KIT LONG-RANGE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
LRI64
7
VCD to LRI64 frames
Request frames are delimited by a start of frame (SOF) and an end of frame (EOF) and are
implemented using a code violation mechanism. Unused options are reserved for future
use.
The LRI64 is ready to receive a new command frame from the VCD after a delay of t
Table
The LRI64 generates a power-on delay of t
powering field. After this delay, the LRI64 is ready to receive a command frame from the
VCD.
In ISO 15693 and ISO 18000-3 Mode 1 standards, the SOF is used to define the data
coding mode that the VCD is going to use in the following command frame.
The SOF that is shown in
does not support the SOF for the “1-out-of-256” data coding mode.)
The corresponding EOF sequence is shown in
Figure 7.
Figure 8.
9.44 µs
14) after having sent a response frame to the VCD.
Request SOF, using the “1-out-of-4” data coding mode
Request EOF
37.76 µs
Figure 7
37.76 µs
selects the “1-out-of-4” data coding mode. (The LRI64
POR
9.44 µs
9.44 µs
Figure
(see
9.44 µs
Table
8.
9.44 µs
14) after being activated by the
37.76 µs
VCD to LRI64 frames
AI06660
AI06662
2
(see
13/49