SI1015-A-GM Silicon Laboratories Inc, SI1015-A-GM Datasheet - Page 77

• Manufacturer Part Number: SI1015-A-GM
• Description: IC TXRX MCU + EZRADIOPRO
• Manufacturer: Silicon Laboratories Inc

Specifications of SI1015-A-GM

• Package / Case: 42-QFN
• Frequency: 240MHz ~ 960MHz
• Data Rate - Maximum: 256kbps
• Modulation Or Protocol: FSK, GFSK, OOK
• Applications: General Purpose
• Power - Output: 13dBm
• Sensitivity: -121dBm
• Voltage - Supply: 0.9 V ~ 3.6 V
• Current - Receiving: 18.5mA
• Current - Transmitting: 30mA
• Data Interface: PCB, Surface Mount
• Memory Size: 8kB Flash, 768B RAM
• Antenna Connector: PCB, Surface Mount
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 240 MHz to 960 MHz
• Interface Type: UART, SMBus, SPI, PCA
• Output Power: 13 dBm
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 4 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK, GFSK, OOK
• Protocol Supported: C2, SMBus
• Core: 8051
• Program Memory Type: Flash
• Program Memory Size: 8 KB
• Data Ram Size: 768 B
• Supply Current (max): 4 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1868-5

5. SAR ADC with 16-Bit Auto-Averaging Accumulator and
The ADC0 on Si1010/1/2/3/4/5 devices is a 300 ksps, 10-bit or 75 ksps, 12-bit successive-approximation-
register (SAR) ADC with integrated track-and-hold and programmable window detector. ADC0 also has an
autonomous low power Burst Mode which can automatically enable ADC0, capture and accumulate sam-
ples, then place ADC0 in a low power shutdown mode without CPU intervention. It also has a 16-bit accu-
mulator that can automatically oversample and average the ADC results. See Section 5.4 for more details
on using the ADC in 12-bit mode.
The ADC is fully configurable under software control via Special Function Registers. The ADC0 operates in
Single-ended mode and may be configured to measure various different signals using the analog multi-
plexer described in “5.7. ADC0 Analog Multiplexer” on page 94. The voltage reference for the ADC is
selected as described in “5.9. Voltage and Ground Reference Options” on page 99.
ADC0PWR
ADC0TK
Autonomous Low Power Burst Mode
AMUX0
From
Burst Mode Logic
AIN+
Figure 5.1. ADC0 Functional Block Diagram
ADC0CF
10/12-Bit
ADC
VDD
SAR
Rev. 1.0
ADC0GTH ADC0GTL
ADC0LTH
ADC0CN
ADC0LTL
Conversion
Si1010/1/2/3/4/5
Start
100
000
001
010
011
32
16-Bit Accumulator
AD0WINT
Compare
Window
CNVSTR Input
AD0BUSY (W)
Timer 0 Overflow
Timer 2 Overflow
Timer 3 Overflow
Logic
77