SI1015-A-GM Silicon Laboratories Inc, SI1015-A-GM Datasheet - Page 107

• Manufacturer Part Number: SI1015-A-GM
• Description: IC TXRX MCU + EZRADIOPRO
• Manufacturer: Silicon Laboratories Inc

Specifications of SI1015-A-GM

• Package / Case: 42-QFN
• Frequency: 240MHz ~ 960MHz
• Data Rate - Maximum: 256kbps
• Modulation Or Protocol: FSK, GFSK, OOK
• Applications: General Purpose
• Power - Output: 13dBm
• Sensitivity: -121dBm
• Voltage - Supply: 0.9 V ~ 3.6 V
• Current - Receiving: 18.5mA
• Current - Transmitting: 30mA
• Data Interface: PCB, Surface Mount
• Memory Size: 8kB Flash, 768B RAM
• Antenna Connector: PCB, Surface Mount
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 240 MHz to 960 MHz
• Interface Type: UART, SMBus, SPI, PCA
• Output Power: 13 dBm
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 4 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK, GFSK, OOK
• Protocol Supported: C2, SMBus
• Core: 8051
• Program Memory Type: Flash
• Program Memory Size: 8 KB
• Data Ram Size: 768 B
• Supply Current (max): 4 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1868-5

7.5. Comparator Register Descriptions
The SFRs used to enable and configure the comparators are described in the following register descrip-
tions. A Comparator must be enabled by setting the CPnEN bit to logic 1 before it can be used. From an
enabled state, a comparator can be disabled and placed in a low power state by clearing the CPnEN bit to
logic 0.
Important Note About Comparator Settings: False rising and falling edges can be detected by the Com-
parator while powering on or if changes are made to the hysteresis or response time control bits. There-
fore, it is recommended that the rising-edge and falling-edge flags be explicitly cleared to logic 0 a short
time after the comparator is enabled or its mode bits have been changed. The Comparator Power Up Time
is specified in Section “Table 4.14. Comparator Electrical Characteristics” on page 66.
SFR Definition 7.1. CPT0CN: Comparator 0 Control
SFR Page= 0x0; SFR Address = 0x9B
Name
Reset
Type
3-2
Bit
Bit
1:0
7
6
5
4
CP0HYP[1:0] Comparator0 Positive Hysteresis Control Bits.
CP0HYN[1:0] Comparator0 Negative Hysteresis Control Bits.
CP0EN
CP0OUT
R/W
CP0RIF
CP0FIF
CP0EN
Name
7
0
CP0OUT
Comparator0 Enable Bit.
0: Comparator0 Disabled.
1: Comparator0 Enabled.
Comparator0 Output State Flag.
0: Voltage on CP0+ < CP0–.
1: Voltage on CP0+ > CP0–.
Comparator0 Rising-Edge Flag. Must be cleared by software.
0: No Comparator0 Rising Edge has occurred since this flag was last cleared.
1: Comparator0 Rising Edge has occurred.
Comparator0 Falling-Edge Flag. Must be cleared by software.
0: No Comparator0 Falling-Edge has occurred since this flag was last cleared.
1: Comparator0 Falling-Edge has occurred.
00: Positive Hysteresis Disabled.
01: Positive Hysteresis = Hysteresis 1.
10: Positive Hysteresis = Hysteresis 2.
11: Positive Hysteresis = Hysteresis 3 (Maximum).
00: Negative Hysteresis Disabled.
01: Negative Hysteresis = Hysteresis 1.
10: Negative Hysteresis = Hysteresis 2.
11: Negative Hysteresis = Hysteresis 3 (Maximum).
R
6
0
CP0RIF
R/W
5
0
CP0FIF
R/W
Rev. 1.0
4
0
Function
3
CP0HYP[1:0]
0
R/W
Si1010/1/2/3/4/5
2
0
1
CP0HYN[1:0]
0
R/W
0
0
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