ADF7020BCPZ Analog Devices Inc, ADF7020BCPZ Datasheet - Page 46

• Manufacturer Part Number: ADF7020BCPZ
• Description: IC TX FSK/ASK ISM BAND 48LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADF7020BCPZ

• Design Resources: Low power, Long Range, ISM Wireless Measuring Node (CN0164)
• Frequency: 431MHz ~ 478MHz and 862MHz ~ 956MHz
• Data Rate - Maximum: 200kbps
• Modulation Or Protocol: ASK, FSK
• Applications: Data Transfer, RKE, Remote Control/Security Systems
• Power - Output: -16dBm ~ 13dBm
• Sensitivity: -119dBm
• Voltage - Supply: 2.3 V ~ 3.6 V
• Current - Receiving: 19mA
• Current - Transmitting: 26.8mA @ 10dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LFCSP
• Data Rate: 200Kbps
• Supply Voltage Range: 2.3V To 3.6V
• Logic Case Style: LFCSP
• No. Of Pins: 48
• Operating Temperature Range: -40°C To +85°C
• Msl: MSL 1 - Unlimited
• Termination Type: SMD
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 7mm
• Product Length (mm): 7mm
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADF7020DBZ3 - BOARD EVAL ADF7020 433-445MHZEVAL-ADF7020DBZ2 - BOARD EVAL ADF7020 862-870MHZEVAL-ADF7020DBZ1 - BOARD EVAL ADF7020 902-928MHZ
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant

ADF7020
REGISTER 13—OFFSET REMOVAL AND SIGNAL GAIN REGISTER
Register 13—Offset Removal and Signal Gain Register Comments
•
•
Because the linear demodulator’s output is proportional to frequency, it usually consists of an offset combined with a relatively low
signal. The offset can be removed, up to a maximum of 1.0, and gained to use the full dynamic range of the DAC:
DAC_Input = (2
Ki (default) = 3. Kp (default) = 2.
TEST DAC GAIN
Test_DAC_Gain
) × ( Signal − Test_DAC_Offset_Removal /4096)
TEST DAC OFFSET REMOVAL
Figure 58. Register 13—Offset Removal and Signal Gain Register
PE4
0
0
0
.
.
.
1
PE3
0
0
0
.
.
.
1
PE2
0
0
1
.
.
.
1
Rev. B | Page 46 of 48
PE1
0
1
0
.
.
.
1
PULSE EXTENSION
NORMAL PULSE WIDTH
2 × PULSE WIDTH
3 × PULSE WIDTH
.
.
.
16 × PULSE WIDTH
EXTENSION
PULSE
KI DEFAULT = 3
KI
KP DEFAULT = 2
KP
CONTROL
BITS