ADF7020BCPZ Analog Devices Inc, ADF7020BCPZ Datasheet - Page 42

• Manufacturer Part Number: ADF7020BCPZ
• Description: IC TX FSK/ASK ISM BAND 48LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADF7020BCPZ

• Design Resources: Low power, Long Range, ISM Wireless Measuring Node (CN0164)
• Frequency: 431MHz ~ 478MHz and 862MHz ~ 956MHz
• Data Rate - Maximum: 200kbps
• Modulation Or Protocol: ASK, FSK
• Applications: Data Transfer, RKE, Remote Control/Security Systems
• Power - Output: -16dBm ~ 13dBm
• Sensitivity: -119dBm
• Voltage - Supply: 2.3 V ~ 3.6 V
• Current - Receiving: 19mA
• Current - Transmitting: 26.8mA @ 10dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LFCSP
• Data Rate: 200Kbps
• Supply Voltage Range: 2.3V To 3.6V
• Logic Case Style: LFCSP
• No. Of Pins: 48
• Operating Temperature Range: -40°C To +85°C
• Msl: MSL 1 - Unlimited
• Termination Type: SMD
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 7mm
• Product Length (mm): 7mm
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADF7020DBZ3 - BOARD EVAL ADF7020 433-445MHZEVAL-ADF7020DBZ2 - BOARD EVAL ADF7020 862-870MHZEVAL-ADF7020DBZ1 - BOARD EVAL ADF7020 902-928MHZ
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant

ADF7020
REGISTER 8—POWER-DOWN TEST REGISTER
Register 8—Power-Down Test Register Comments
•
•
For a combined LNA/PA matching network, Bit R8_DB12 should always be set to 0. This is the power-up default condition.
It is not necessary to write to this register under normal operating conditions.
PD7
0
1
PA (Rx MODE)
PA OFF
PA ON
SW1
0
1
LR2
X
X
Tx/Rx SWITCH
DEFAULT (ON)
OFF
LR1
0
1
DB13
PD7
RSSI MODE
RSSI OFF
RSSI ON
PD6
0
1
DB12
SW1
DEMOD ENABLE
DEMOD OFF
DEMOD ON
DB11
LR2
LOG AMP/
RSSI
DB10
Figure 53. Register 8—Power-Down Test Register
LR1
DB9
PD6
PD5
0
1
Rev. B | Page 42 of 48
DB8
PD5
ADC ENABLE
ADC OFF
ADC ON
DB7
PD4
PD4
0
1
DB6
PD3
FILTER ENABLE
FILTER OFF
FILTER ON
PD3
0
1
DB5
PD2
LNA/MIXER ENABLE
LNA/MIXER OFF
LNA/MIXER ON
DB4
PD1
PLE1
(FROM REG 0)
0
0
0
0
1
C4(1)
DB3
C3(0)
DB2
CONTROL
BITS
C2(0)
DB1
PD2
0
0
1
1
X
PD1
0
1
0
1
X
C1(0)
DB0
LOOP
CONDITION
VCO/PLL OFF
PLL ON
VCO ON
PLL/VCO ON
PLL/VCO ON