ATMEGA64RZAV-10PU Atmel, ATMEGA64RZAV-10PU Datasheet - Page 81

• Manufacturer Part Number: ATMEGA64RZAV-10PU
• Description: MCU ATMEGA644/AT86RF230 40-DIP
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA64RZAV-10PU

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4 Zigbee
• Power - Output: 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Data Interface: PCB, Surface Mount
• Memory Size: 64kB Flash, 2kB EEPROM, 4kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 40-DIP (0.600", 15.24mm)
• Wireless Frequency: 2.4 GHz
• Interface Type: JTAG, SPI
• Output Power: 3 dBm
• For Use With: ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Applications: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: ATmega64

12 Register Reference
Table 12-1. Register Summary – Non Reserved Registers
5131E-MCU Wireless-02/09
Addr.
0x0E
0x0F
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
0x2A
0x2B
0x2C
0x2D
0x2E
0x01
0x02
0x03
0x05
0x06
0x07
0x08
0x09
0x10
0x11
0x12
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
SHORT_ADDR_0
SHORT_ADDR_1
PHY_ED_LEVEL
VERSION_NUM
CSMA_SEED_0
CSMA_SEED_1
PHY_TX_PWR
IEEE_ADDR_0
IEEE_ADDR_1
IEEE_ADDR_2
IEEE_ADDR_3
IEEE_ADDR_4
IEEE_ADDR_5
IEEE_ADDR_6
IEEE_ADDR_7
PHY_CC_CCA
TRX_STATUS
TRX_CTRL_0
IRQ_STATUS
CCA_THRES
VREG_CTRL
XOSC_CTRL
TRX_STATE
PART_NUM
XAH_CTRL
IRQ_MASK
PHY_RSSI
MAN_ID_0
MAN_ID_1
PAN_ID_0
PAN_ID_1
PLL_DCU
BATMON
Name
PLL_CF
PLL_DCU_START
MASK_BAT_LOW MASK_TRX_UR
TX_AUTO_CRC_ON
RX_CRC_VALID
CCA_REQUEST
PLL_CF_START
AVREG_EXT
CCA_DONE
BAT_LOW
Bit 7
Reserved
PAD_IO
MIN_BE
TRAC_STATUS
CCA_STATUS
AVDD_OK
TRX_UR
The AT86RF230 provides a register space of 64 8-bit registers, which is used to
configure, control and monitor the radio transceiver. The registers can be accessed in
any order.
Note: All registers not mentioned within the following table are reserved for internal use
and must not be overwritten. When writing to a register, any reserved bits shall be
overwritten only with their reset value (see Table 12-2).
Bit 6
MAX_FRAME_RETRIES
XTAL_MODE
CCA_MODE
Reserved
Reserved
AACK_SET_PD
BATMON_OK
Reserved
Reserved
Bit 5
PAD_IO_CLKM
Reserved
Reserved
Reserved
BATMON_HR
Reserved
Bit 4
SHORT_ADDR_0
SHORT_ADDR_1
VERSION_NUM
CSMA_SEED_0
IEEE_ADDR_0
IEEE_ADDR_1
IEEE_ADDR_2
IEEE_ADDR_3
IEEE_ADDR_4
IEEE_ADDR_5
IEEE_ADDR_6
IEEE_ADDR_7
PART_NUM
ED_LEVEL
MAN_ID_0
MAN_ID_1
PAN_ID_0
PAN_ID_1
MASK_TRX_END MASK_RX_START MASK_PLL_UNLOCK MASK_PLL_LOCK pg. 20
CLKM_SHA_SEL
I_AM_COORD
DVREG_EXT
TRX_END
Reserved
Reserved
Bit 3
MAX_CSMA_RETRIES
TRX_STATUS
RX_START
TRX_CMD
CHANNEL
DVDD_OK
Bit 2
RSSI
CCA_ED_THRES
BATMON_VTH
XTAL_TRIM
TX_PWR
CSMA_SEED_1
PLL_UNLOCK
CLKM_CTRL
Bit 1
Reserved
AT86RF230
PLL_LOCK
Reserved
Bit 0
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