ATMEGA64RZAV-10PU Atmel, ATMEGA64RZAV-10PU Datasheet - Page 27

• Manufacturer Part Number: ATMEGA64RZAV-10PU
• Description: MCU ATMEGA644/AT86RF230 40-DIP
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA64RZAV-10PU

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4 Zigbee
• Power - Output: 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Data Interface: PCB, Surface Mount
• Memory Size: 64kB Flash, 2kB EEPROM, 4kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 40-DIP (0.600", 15.24mm)
• Wireless Frequency: 2.4 GHz
• Interface Type: JTAG, SPI
• Output Power: 3 dBm
• For Use With: ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Applications: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: ATmega64

Table 7-2. Block Settling Time
7.1.5 Register Description
5131E-MCU Wireless-02/09
No
5
6
7
8
9
10
11
12
13
Block
XOSC
DVREG
AVREG
PLL, initial
PLL, RX → TX
PLL, TX → RX
Symbol
t
t
t
t
t
t
t
t
t
TR5
TR6
TR7
TR8
TR9
TR10
TR11
TR12
TR13
Transition
PLL_ON
TRX_OFF →
RX_ON
PLL_ON
RX_ON
PLL_ON
BUSY_TX →
All states
RST = L →
→
→
→
→
→
→
Time [µs]
(typical)
500
100
60
60
Bit
0x01
Read/Write
Reset value
The state transition timing is calculated based on the timing of the individual blocks as
shown in Figure 7-3. The worst case values include maximum operating temperature,
minimum supply voltage, and device parameter variations.
Register 0x01 (TRX_STATUS)
The TRX_STATUS register signals the current state of the radio transceiver as well as
the status of the CCA measurement. Note, a read access to the register clears bits
CCA_DONE and CCA_STATUS.
This register is used for Extended and Basic Operating Mode. The Extended Operating
Mode functionality is described in section 7.2.
TRX_OFF
RX_ON
TRX_OFF
RX_ON
PLL_ON
BUSY_TX
PLL_ON
TRX_OFF
TRX_OFF
16
32
(worst case)
Time [µs]
CCA_DONE
1000
1000
1000
150
R
7
0
Time [µs]
(tppical)
180
120
16
32
1
1
1
1
1
Comments
Until clock signal is provided at CLKM pin.
Depends on crystal Q factor and load capacitor
Depends on external bypass capacitor at DVDD (CB3 = 1 µF nom.,
10 µF worst case)
Depends on external bypass capacitor at AVDD (CB1 = 1 µF nom.,
10 µF worst case)
PLL settling time
PLL settling time
CCA_STATUS
Comments
Depends on external bypass capacitor at AVDD (1 µF nom).
When asserting SLP_TR pin first symbol transmission is
delayed by 16 µs (PLL settling and PA ramp up).
32 µs PLL settling time
Using TRX_CMD FORCE_TRX_OFF (see register 0x02), not
valid for SLEEP mode
Depends on external bypass capacitor at DVDD (1 µF nom),
not valid for P_ON mode
R
6
0
Reserved
R
5
0
TRX_STATUS
AT86RF230
R
4
0
TRX_STATUS
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