ATMEGA64RZAV-10PU Atmel, ATMEGA64RZAV-10PU Datasheet - Page 47

MCU ATMEGA644/AT86RF230 40-DIP

ATMEGA64RZAV-10PU

Manufacturer Part Number
ATMEGA64RZAV-10PU
Description
MCU ATMEGA644/AT86RF230 40-DIP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets

Specifications of ATMEGA64RZAV-10PU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
64kB Flash, 2kB EEPROM, 4kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
40-DIP (0.600", 15.24mm)
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Applications
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega64
8.1.2.3 Sequence number
8.1.2.4 Addressing fields
8.1.2.5 MAC Service Data Unit (MSDU)
5131E-MCU Wireless-02/09
nonbeacon-enabled networks). The AT86RF230 parses this bit during RX_AACK
operation and transmits an acknowledgment frame if necessary.
Bit 6 the “Intra-PAN” subfield indicates that in a frame, where both, the destination and
source addresses are present, the PAN ID is omitted from the source address field.
This bit is evaluated by the AT86RF230 address filter logic when using RX_AACK
operation.
Bit [11:10] the “Destination address mode” subfield describes the format of the
destination address of the frame. The values of the address modes are summarized in
Table 8-2, according to IEEE 802.15.4-2003:
Table 8-2. IEEE 802.15.4-2003 Address Modes
If the destination address mode is either 2 or 3 (i.e. if the destination address is present
at all), it always consists of a 16-bit PAN ID first, followed by either the 16-bit or 64-bit
address as described by the mode.
Bit [15:14] form the “Source address mode” subfield, with a similar meaning as
“Destination address mode”.
The address field description bits of the FCF (Bits 6, 10, 11, 14, 15) affect the address
filter logic of the AT86RF230 while operating in RX_AACK states (see section 7.2.3.1).
The one-octet sequence number following the FCF identifies a particular frame, so that
duplicated frame transmissions can be detected. While operating in RX_AACK states,
the content of this field is copied from the frame to be acknowledged into the
acknowledgment frame.
The addressing fields terminate the MHR. The destination address (if present) is always
transmitted first, followed by the source address (if present). Each address consists of
the PAN ID and a device address. If both addresses are present, and the “Intra PAN”
subfield in the FCF is set to 1, the source PAN ID is omitted.
Note that in addition to these general rules, IEEE 802.15.4-2003 further restricts the
valid address combinations for the individual possible MAC frame types. For example,
the situation where both addresses are omitted (source addressing mode = 0 and
destination addressing mode = 0) is only allowed for acknowledgment frames. The
address filter in the AT86RF230 has been designed to apply to IEEE 802.15.4-2003
compliant frames only.
This is the actual MAC payload. It is usually structured according to the individual frame
type descriptions in IEEE 802.15.4-2003.
Bit [11:10]
Bit [15:14]
Addressing Mode Value
00
01
10
11
value
0
1
2
3
Description
Address not present
Reserved, must not be used
Address is 16-bit short
Address is 64-bit extended address
AT86RF230
47

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