MC68HC908JB8JDW Freescale Semiconductor, MC68HC908JB8JDW Datasheet - Page 197

IC MCU 8K FLASH 3MHZ 20-SOIC

MC68HC908JB8JDW

Manufacturer Part Number
MC68HC908JB8JDW
Description
IC MCU 8K FLASH 3MHZ 20-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908JB8JDW

Core Processor
HC08
Core Size
8-Bit
Speed
3MHz
Connectivity
USB
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

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MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
NOTE:
NOTE:
Before enabling a TIM channel register for input capture operation, make
sure that the PTEx/TCHx pin is stable for at least two bus clocks.
TOVx — Toggle-On-Overflow Bit
When TOVx is set, a TIM counter overflow takes precedence over a
channel x output compare if both occur at the same time.
CHxMAX — Channel x Maximum Duty Cycle Bit
PTEx/TCHx
When channel x is an output compare channel, this read/write bit
controls the behavior of the channel x output when the TIM counter
overflows. When channel x is an input capture channel, TOVx has no
effect. Reset clears the TOVx bit.
When the TOVx bit is at logic 1, setting the CHxMAX bit forces the
duty cycle of buffered and unbuffered PWM signals to 100%. As
Figure 11-8
is set or cleared. The output stays at the 100% duty cycle level until
the cycle after CHxMAX is cleared.
CHxMAX
1 = Channel x pin toggles on TIM counter overflow
0 = Channel x pin does not toggle on TIM counter overflow
OVERFLOW
Timer Interface Module (TIM)
shows, the CHxMAX bit takes effect in the cycle after it
COMPARE
PERIOD
OUTPUT
Figure 11-8. CHxMAX Latency
OVERFLOW
COMPARE
OUTPUT
OVERFLOW
COMPARE
OUTPUT
Timer Interface Module (TIM)
OVERFLOW
COMPARE
OUTPUT
Technical Data
I/O Registers
OVERFLOW
197

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