CY7C60223-PXC Cypress Semiconductor Corp, CY7C60223-PXC Datasheet - Page 56

• Manufacturer Part Number: CY7C60223-PXC
• Description: IC MCU 8K WIRELESS 24-DIP
• Manufacturer: Cypress Semiconductor Corp
• Series: enCoRe™ II CY7C602xxr

Specifications of CY7C60223-PXC

• Core Processor: M8C
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: SPI
• Peripherals: LVD, POR, WDT
• Number Of I /o: 20
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 24-DIP (0.300", 7.62mm)
• For Use With: 770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY3216 - KIT PROGRAMMER MODULAR428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Other names: 428-1797

19.4 Interrupt Registers
19.4.1 Interrupt Clear Register
The Interrupt Clear Registers (INT_CLRx) are used to enable the individual interrupt sources’ ability to clear posted interrupts.
When an INT_CLRx register is read, any bits that are set indicates an interrupt has been posted for that hardware resource. Therefore,
reading these registers enables the user to determine all posted interrupts.
Table 19-1. Interrupt Clear 0 (INT_CLR0) [0xDA] [R/W]
Table 19-2. Interrupt Clear 1 (INT_CLR1) [0xDB] [R/W]
Table 19-3. Interrupt Clear 2 (INT_CLR2) [0xDC] [R/W]
Document 38-16016 Rev. *F
When reading this register,
0 = There is no posted interrupt for the corresponding hardware.
1 = There is a posted interrupt for the corresponding hardware.
Writing a ‘0’ to the bits clears the posted interrupts for the corresponding hardware. Writing a ‘1’ to the bits and to the ENSWINT
(Bit 7 of the INT_MSK3 Register) posts the corresponding hardware interrupt.
The GPIO interrupts are edge-triggered.
When reading this register,
0 = There is no posted interrupt for the corresponding hardware.
1 = There is a posted interrupt for the corresponding hardware.
Writing a ‘0’ to the bits clears the posted interrupts for the corresponding hardware. Writing a ‘1’ to the bits AND to the ENSWINT
(Bit 7 of the INT_MSK3 Register) posts the corresponding hardware interrupt.
When reading this register,
0 = There is no posted interrupt for the corresponding hardware.
1 = There is a posted interrupt for the corresponding hardware.
Writing a ‘0’ to the bits clears the posted interrupts for the corresponding hardware. Writing a ‘1’ to the bits AND to the ENSWINT
(Bit 7 of the INT_MSK3 Register) posts the corresponding hardware interrupt.
Read/Write
Read/Write
Read/Write
Default
Default
Default
Field
Field
Field
Bit #
Bit #
Bit #
GPIO Port 1
Reserved
TCAP0
R/W
R/W
7
0
7
0
7
–
0
Prog Interval
Sleep Timer
GPIO Port 4
Timer
R/W
R/W
R/W
6
0
6
0
6
0
1-ms Program-
mable Interrupt
GPIO Port 3
INT1
R/W
R/W
R/W
5
0
5
0
5
0
GPIO Port 0
GPIO Port 2
R/W
R/W
4
0
4
–
0
4
0
SPI Receive
Reserved
R/W
3
0
3
–
0
3
–
0
SPI Transmit
Reserved
INT2
R/W
R/W
CY7C601xx, CY7C602xx
2
0
2
–
0
2
0
16-bit Counter
Wrap
INT0
R/W
R/W
1
0
1
–
0
1
0
POR/LVD
TCAP1
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R/W
R/W
0
0
0
–
0
0
0
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