CY7C60223-PXC Cypress Semiconductor Corp, CY7C60223-PXC Datasheet - Page 20

IC MCU 8K WIRELESS 24-DIP

CY7C60223-PXC

Manufacturer Part Number
CY7C60223-PXC
Description
IC MCU 8K WIRELESS 24-DIP
Manufacturer
Cypress Semiconductor Corp
Series
enCoRe™ II CY7C602xxr
Datasheet

Specifications of CY7C60223-PXC

Core Processor
M8C
Core Size
8-Bit
Speed
12MHz
Connectivity
SPI
Peripherals
LVD, POR, WDT
Number Of I /o
20
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
24-DIP (0.300", 7.62mm)
For Use With
770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY3216 - KIT PROGRAMMER MODULAR428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
428-1797

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C60223-PXC
Manufacturer:
TEXAS
Quantity:
93
11.6.1 Checksum Function
The Checksum function calculates a 16-bit checksum over a
user specifiable number of blocks, within a single Flash macro
(Bank) starting from block zero. The BLOCKID parameter is
used to pass in the number of blocks to calculate the checksum
over. A BLOCKID value of ‘1’ calculates the checksum of only
block 0, while a BLOCKID value of ‘0’ calculates the checksum
of all 256 user blocks. The 16-bit checksum is returned in KEY1
and KEY2. The parameter KEY1 holds the lower eight bits of the
checksum and the parameter KEY2 holds the upper eight bits of
the checksum.
The checksum algorithm executes the following sequence of
three instructions over the number of blocks times 64 to be
checksummed.
romx
add [KEY1], A
adc [KEY2], 0
Document 38-16016 Rev. *F
Table 0
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
LPOSCTR
Silicon ID
Family /
at 3.30V
F8h
Die ID
32 kHz
[15-8]
LPOSCTR
Silicon ID
Revision
at 3.00V
32 kHz
F9h
[7-0]
ID
Figure 11-3. SROM Table
LPOSCTR
at 2.85V
FAh
32 kHz
LPOSCTR
at 2.70V
FBh
32 kHz
Table 11-1. Checksum Parameters
BLOCKID
Name
IOSCTR
at 3.30V
KEY1
KEY2
24 MHz
FCh
IOSCTR
at 3.00V
24 MHz
FDh
Address
0,FAh
0,F8h
0,F9h
IOSCTR
at 2.85V
24 MHz
FEh
CY7C601xx, CY7C602xx
3Ah
Stack Pointer value when SSC is
executed
Number of Flash blocks to calculate
checksum on
IOSCTR
at 2.70V
24 MHz
FFh
Description
Page 20 of 68
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