CY7C60223-PXC Cypress Semiconductor Corp, CY7C60223-PXC Datasheet - Page 22

IC MCU 8K WIRELESS 24-DIP

CY7C60223-PXC

Manufacturer Part Number
CY7C60223-PXC
Description
IC MCU 8K WIRELESS 24-DIP
Manufacturer
Cypress Semiconductor Corp
Series
enCoRe™ II CY7C602xxr
Datasheet

Specifications of CY7C60223-PXC

Core Processor
M8C
Core Size
8-Bit
Speed
12MHz
Connectivity
SPI
Peripherals
LVD, POR, WDT
Number Of I /o
20
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
24-DIP (0.300", 7.62mm)
For Use With
770-1001 - ISP 4PORT CYPRESS ENCORE II MCUCY3216 - KIT PROGRAMMER MODULAR428-1774 - EXTENSION KIT FOR ENCORE II428-1773 - KIT DEVELOPMENT ENCORE II
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
428-1797

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C60223-PXC
Manufacturer:
TEXAS
Quantity:
93
When using the 32 kHz oscillator, the PITMRL/H is read until two
consecutive readings match before sending and receiving data.
The following firmware example assumes the developer is
interested in the lower byte of the PIT.
Read_PIT_counter:
mov A, reg[PITMRL]
mov [57h], A
mov A, reg[PITMRL]
mov [58h],A
mov [59h], A
mov A, reg[PITMRL]
mov [60h], A
;;;Start comparison
mov A,[60h]
mov X, [59h]
sub A, [59h]
jz done
mov A, [59h]
mov X, [58h]
sub A, [58h]
jz done
mov X, [57h]
;;;correct data is in memory location 57h
done:
mov [57h], X
ret
The CY7C601xx part is optionally sourced from an external
crystal oscillator. The external clock driving on CLKIN range is
from 187 kHz to 24 MHz.
Document 38-16016 Rev. *F
12.2 Clock Architecture Description
The enCoRe II LV clock selection circuitry allows the selection of
independent clocks for the CPU, Interval Timers, and Capture
Timers.
On the CY7C601xx, the external oscillator is sourced by the
crystal oscillator. When the crystal oscillator is disabled, it is
sourced directly from the CLKIN pin. The external crystal
oscillator is fed through the EFTB block, which is optionally
bypassed.
12.2.1 CPU Clock
The CPU clock, CPUCLK, is sourced from the external crystal
oscillator, the internal 24 MHz oscillator, or the Internal 32 kHz
low power oscillator. The selected clock source can optionally be
divided by 2
When it is not being used by the external crystal oscillator, the
CLKOUT pin is driven from one of many sources. This is used
for test and also in some applications. The sources that drive the
CLKOUT are:
CLKIN after the optional EFTB filter.
Internal 24 MHz oscillator.
Internal 32 kHz oscillator.
CPUCLK after the programmable divider.
n-1
where n is 0–7 (see
CY7C601xx, CY7C602xx
Table 12-3
on page 24).
Page 22 of 68
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