EP9301-CQ Cirrus Logic Inc, EP9301-CQ Datasheet - Page 686

• Manufacturer Part Number: EP9301-CQ
• Description: IC ARM920T MCU 166MHZ 208-LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9301-CQ

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 166MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 598-1248

21
21-30
I
EP93xx User’s Guide
2
S Controller
Tx1_overflow:
Tx2_overflow:
Rx0_underflow:
Rx1_underflow:
Rx2_underflow:
tx0_fifo_full:
tx0_fifo_empty:
tx0_fifo_half_empty:when = 1, FIFO is half empty, otherwise less than half
rx0_fifo_full:
rx0_fifo_empty:
rx0_fifo_half_full: when = 1, FIFO is half full, otherwise less than half full
tx1_fifo_full:
tx1_fifo_empty:
tx1_fifo_half_empty:when = 1, FIFO is half empty, otherwise less than half
rx1_fifo_full:
rx1_fifo_empty:
rx1_fifo_half_full: when = 1, FIFO is half full, otherwise less than half full
tx2_fifo_full:
tx2_fifo_empty:
tx2_fifo_half_empty:when = 1, FIFO is half empty, otherwise less than half
rx2_fifo_full:
Copyright 2007 Cirrus Logic
when = 1, the tx1 FIFO is full and an attempt has been
made to write data to it by the APB or DMA. This bit is
cleared by writing a 0 to it.
when = 1, the tx2 FIFO is full and an attempt has been
made to write data to it by the APB or DMA. This bit is
cleared by writing a 0 to it.
when = 1, the rx0 FIFO is empty and an attempt has been
made to read data from it by the APB or DMA. This bit is
cleared by writing a 0 to it.
when = 1, the rx1 FIFO is empty and an attempt has been
made to read data from it by the APB or DMA. This bit is
cleared by writing a 0 to it.
when = 1, the rx2 FIFO is empty and an attempt has been
made to read data from it by the APB or DMA. This bit is
cleared by writing a 0 to it.
when = 1, FIFO is full, otherwise not full
when = 1, FIFO is empty, otherwise not empty
empty
when = 1, FIFO is full, otherwise not full
when = 1, FIFO is empty, otherwise not empty
when = 1, FIFO is full, otherwise not full
when = 1, FIFO is empty, otherwise not empty
empty
when = 1, FIFO is full, otherwise not full
when = 1, FIFO is empty, otherwise not empty
when = 1, FIFO is full, otherwise not full
when = 1, FIFO is empty, otherwise not empty
empty
when = 1, FIFO is full, otherwise not full
DS785UM1