EP9301-CQ Cirrus Logic Inc, EP9301-CQ Datasheet - Page 686
![IC ARM920T MCU 166MHZ 208-LQFP](/photos/12/23/122383/mfg_ep9301_parts_sml.jpg)
EP9301-CQ
Manufacturer Part Number
EP9301-CQ
Description
IC ARM920T MCU 166MHZ 208-LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets
1.EDB9301.pdf
(5 pages)
2.EDB9301.pdf
(4 pages)
3.EP9307-CRZ.pdf
(824 pages)
4.EP9301-IQ.pdf
(41 pages)
Specifications of EP9301-CQ
Core Processor
ARM9
Core Size
16/32-Bit
Speed
166MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
598-1248
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9301-CQZ
Manufacturer:
CIRRUS
Quantity:
3 390
Part Number:
EP9301-CQZ
Manufacturer:
CIRRUSLOGIC
Quantity:
20 000
Company:
Part Number:
EP9301-CQZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
- EDB9301 PDF datasheet
- EDB9301 PDF datasheet #2
- EP9307-CRZ PDF datasheet #3
- EP9301-IQ PDF datasheet #4
- Current page: 686 of 824
- Download datasheet (13Mb)
21
21-30
I
EP93xx User’s Guide
2
S Controller
Tx1_overflow:
Tx2_overflow:
Rx0_underflow:
Rx1_underflow:
Rx2_underflow:
tx0_fifo_full:
tx0_fifo_empty:
tx0_fifo_half_empty:when = 1, FIFO is half empty, otherwise less than half
rx0_fifo_full:
rx0_fifo_empty:
rx0_fifo_half_full: when = 1, FIFO is half full, otherwise less than half full
tx1_fifo_full:
tx1_fifo_empty:
tx1_fifo_half_empty:when = 1, FIFO is half empty, otherwise less than half
rx1_fifo_full:
rx1_fifo_empty:
rx1_fifo_half_full: when = 1, FIFO is half full, otherwise less than half full
tx2_fifo_full:
tx2_fifo_empty:
tx2_fifo_half_empty:when = 1, FIFO is half empty, otherwise less than half
rx2_fifo_full:
Copyright 2007 Cirrus Logic
when = 1, the tx1 FIFO is full and an attempt has been
made to write data to it by the APB or DMA. This bit is
cleared by writing a 0 to it.
when = 1, the tx2 FIFO is full and an attempt has been
made to write data to it by the APB or DMA. This bit is
cleared by writing a 0 to it.
when = 1, the rx0 FIFO is empty and an attempt has been
made to read data from it by the APB or DMA. This bit is
cleared by writing a 0 to it.
when = 1, the rx1 FIFO is empty and an attempt has been
made to read data from it by the APB or DMA. This bit is
cleared by writing a 0 to it.
when = 1, the rx2 FIFO is empty and an attempt has been
made to read data from it by the APB or DMA. This bit is
cleared by writing a 0 to it.
when = 1, FIFO is full, otherwise not full
when = 1, FIFO is empty, otherwise not empty
empty
when = 1, FIFO is full, otherwise not full
when = 1, FIFO is empty, otherwise not empty
when = 1, FIFO is full, otherwise not full
when = 1, FIFO is empty, otherwise not empty
empty
when = 1, FIFO is full, otherwise not full
when = 1, FIFO is empty, otherwise not empty
when = 1, FIFO is full, otherwise not full
when = 1, FIFO is empty, otherwise not empty
empty
when = 1, FIFO is full, otherwise not full
DS785UM1
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