EP9301-CQ Cirrus Logic Inc, EP9301-CQ Datasheet - Page 375

IC ARM920T MCU 166MHZ 208-LQFP

EP9301-CQ

Manufacturer Part Number
EP9301-CQ
Description
IC ARM920T MCU 166MHZ 208-LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9301-CQ

Core Processor
ARM9
Core Size
16/32-Bit
Speed
166MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
598-1248

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9301-CQ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
EP9301-CQZ
Manufacturer:
CIRRUS
Quantity:
3 390
Part Number:
EP9301-CQZ
Quantity:
1
Part Number:
EP9301-CQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
EP9301-CQZ
Manufacturer:
CIRRUSLOGIC
Quantity:
20 000
Part Number:
EP9301-CQZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
RXDCurAdd
DS785UM1
31
15
Definition:
Bit Descriptions:
Address:
Chip Reset:
Soft Reset:
Definition:
Bit Descriptions:
30
14
29
13
28
12
Receive Descriptor Queue Current Length register. The Receive Descriptor
Queue Current Length defines the number of bytes between the Receive
Descriptor Current Address and the end of the receive descriptor queue. This
value is used internally to wrap the pointer back to the start of the queue. The
register should not normally be written.
RSVD:
RDCL:
0x8001_0098 - Read/Write
0x0000_0000
Unchanged
Receive Descriptor Current Address register. The Receive Current Descriptor
Address contains the pointer to the next entry to be read from the receive
descriptor queue. This should be set at initialization time to the required
starting point in the descriptor queue. During operation the MAC will update
this address following successful descriptor reads. Intermediate values in this
register will not necessarily align to descriptor boundaries, nor directly effect
the current descriptor in use because several descriptors may be buffered
inside the MAC.
RDCA:
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Reserved. Unknown During Read.
Receive Descriptor Current Length.
Receive Descriptor Current Address.
24
8
RDCA
RDCA
23
7
22
6
21
1/10/100 Mbps Ethernet LAN Controller
5
20
4
19
3
EP93xx User’s Guide
18
2
17
1
16
9-73
0
9

Related parts for EP9301-CQ