PIC16LC774/PQ Microchip Technology, PIC16LC774/PQ Datasheet - Page 131

• Manufacturer Part Number: PIC16LC774/PQ
• Description: IC MCU OTP 4KX14 A/D PWM 44-MQFP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC774/PQ

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-MQFP, 44-PQFP
• Processor Series: PIC16LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, SSP, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

12.3
The PIC16C77X devices have several different resets.
These resets are grouped into two classifications;
power-up and non-power-up. The power-up type resets
are the power-on and brown-out resets which assume
the device V
for the device’s configuration. The non-power up type
resets assume normal operating limits were main-
tained before/during and after the reset.
• Power-on Reset (POR)
• Brown-out Reset (BOR)
• MCLR reset during normal operation
• MCLR reset during SLEEP
• WDT Reset (during normal operation)
FIGURE 12-5: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
1999 Microchip Technology Inc.
MCLR
OSC1
Note 1:
V
DD
Reset
On-chip
RC OSC
This is a separate oscillator from the RC oscillator of the CLKIN pin.
OST/PWRT
DD
was below its normal operating range
Brown-out
V
(1)
Module
detect
WDT
DD
Reset
rise
OST
PWRT
10-bit Ripple counter
WDT
Reset
10-bit Ripple counter
Time-out
BODEN
Power-on Reset
External
Reset
SLEEP
Advance Information
Enable PWRT
Enable OST
Some registers are not affected in any reset condition.
Their status is unknown on a power-up reset and
unchanged in any other reset. Most other registers are
placed into an initialized state upon reset, however they
are not affected by a WDT reset during sleep because
this is considered a WDT Wakeup, which is viewed as
the resumption of normal operation.
Several status bits have been provided to indicate
which reset occurred (see
for a full description of reset states of all registers.
A simplified block diagram of the on-chip reset circuit is
shown in
These devices have a MCLR noise filter in the MCLR
reset path. The filter will detect and ignore small pulses.
It should be noted that a WDT Reset does not drive
MCLR pin low.
Figure
12-5.
PIC16C77X
Table
S
R
12-4). See
DS30275A-page 131
Q
Chip_Reset
Table 12-6