PIC16LC774/PQ Microchip Technology, PIC16LC774/PQ Datasheet - Page 12

• Manufacturer Part Number: PIC16LC774/PQ
• Description: IC MCU OTP 4KX14 A/D PWM 44-MQFP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC774/PQ

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-MQFP, 44-PQFP
• Processor Series: PIC16LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, SSP, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16C77X
FIGURE 2-2:
DS30275A-page 12
(1) Not implemented on PIC16C773.
*
Indirect addr.
Unimplemented data memory locations, read as ’0’.
Not a physical register.
CCP1CON
CCP2CON
SSPCON
CCPR1H
96 Bytes
SSPBUF
Purpose
Register
Bank 0
CCPR1L
CCPR2H
ADRESH
ADCON0
STATUS
PCLATH
INTCON
CCPR2L
General
PORTB
PORTC
PORTD
PORTE
TMR1H
PORTA
T1CON
T2CON
RCREG
TMR1L
TXREG
RCSTA
TMR0
TMR2
PIR1
PIR2
PCL
FSR
REGISTER FILE MAP
(1)
(1)
(*)
Address
File
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
7Fh
Indirect addr.
OPTION_REG
SSPCON2
accesses
80 Bytes
SSPSTAT
ADCON1
Purpose
Register
REFCON
ADRESL
General
70h-7Fh
SSPADD
LVDCON
SPBRG
STATUS
PCLATH
INTCON
TXSTA
Bank 1
TRISA
TRISB
TRISC
TRISD
TRISE
PCON
PIE1
PIE2
PCL
FSR
PR2
Advance Information
(1)
(1)
(*)
Address
File
EFh
F0h
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
A0h
FFh
Indirect addr.
70h - 7Fh
accesses
80 Bytes
INTCON
Purpose
Register
STATUS
PORTB
PCLATH
General
Bank 2
TMR0
PCL
FSR
(*)
Address
100h
101h
102h
103h
104h
105h
106h
107h
108h
109h
10Ah
10Bh
10Ch
10Dh
10Eh
10Fh
110h
111h
112h
113h
114h
115h
116h
117h
118h
119h
11Ah
11Bh
11Ch
11Dh
11Eh
11Fh
120h
6Fh
70h
17Fh
File
1999 Microchip Technology Inc.
Indirect addr.
OPTION_REG
70h - 7Fh
accesses
PCLATH
INTCON
STATUS
Bank 3
TRISB
FSR
PCL
(*)
Address
File
180h
181h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch
18Dh
18Eh
18Fh
190h
191h
192h
193h
194h
195h
196h
197h
198h
199h
19Ah
19Bh
19Ch
19Dh
19Eh
19Fh
1A0h
1EFh
1F0h
1FFh