PIC17C756-16/SP Microchip Technology, PIC17C756-16/SP Datasheet - Page 84

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PIC17C756-16/SP

Manufacturer Part Number
PIC17C756-16/SP
Description
MICRO CTRL 16K MEMORY OTP 64SDIP
Manufacturer
Microchip Technology
Series
PIC® 17Cr

Specifications of PIC17C756-16/SP

Core Processor
PIC
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
64-SDIP (0.750", 19.05mm)
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
PIC17C756-16/P

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17C756-16/SP
Manufacturer:
MICROCHIP
Quantity:
8
Part Number:
PIC17C756-16/SP
Manufacturer:
MIC
Quantity:
6 243
PIC17C7XX
10.6
PORTF is an 8-bit wide bi-directional port. The corre-
sponding data direction register is DDRF. A ’1’ in DDRF
configures the corresponding port pin as an input. A ’0’
in the DDRF register configures the corresponding port
pin as an output. Reading PORTF reads the status of
the pins, whereas writing to PORTF will write to the
respective port latch.
All eight bits of PORTF are multiplexed with 8 channels
of the 10-bit A/D converter.
Upon RESET, the entire Port is automatically config-
ured as analog inputs and must be configured in soft-
ware to be a digital I/O.
FIGURE 10-13:
DS30289B-page 84
Note: I/O pins have protection diodes to V
WR PORTF
WR DDRF
RD PORTF
Data Bus
V
AIN
PORTF and DDRF Registers
PCFG3:PCFG0
CHS3:CHS0
BLOCK DIAGRAM OF RF7:RF0
Data Latch
DDRF Latch
D
CK
D
CK
RD DDRF
Q
Q
Q
Q
DD
and V
SS
Q
.
EN
EN
D
Example 10-6 shows an instruction sequence to initial-
ize PORTF. The Bank Select Register (BSR) must be
selected to Bank 5 for the port to be initialized. The fol-
lowing example uses the MOVLB instruction to load the
BSR register for bank selection.
EXAMPLE 10-6:
To other pads
To other pads
MOVLB
MOVWF
MOVWF
CLRF
MOVLW
MOVWF
5
0x0E
ADCON1
PORTF, F
0x03
DDRF
V
V
P
N
DD
SS
INITIALIZING PORTF
; Select Bank 5
; Configure PORTF as
; Digital
; Initialize PORTF data
;
;
;
; Value used to init
;
; Set RF<1:0> as inputs
;
2000 Microchip Technology Inc.
latches before
the data direction
register
data direction
RF<7:2> as outputs
ST
Input
Buffer
I/O pin

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