PIC17C756-16/SP Microchip Technology, PIC17C756-16/SP Datasheet - Page 135

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PIC17C756-16/SP

Manufacturer Part Number
PIC17C756-16/SP
Description
MICRO CTRL 16K MEMORY OTP 64SDIP
Manufacturer
Microchip Technology
Series
PIC® 17Cr

Specifications of PIC17C756-16/SP

Core Processor
PIC
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
64-SDIP (0.750", 19.05mm)
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
PIC17C756-16/P

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Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17C756-16/SP
Manufacturer:
MICROCHIP
Quantity:
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PIC17C756-16/SP
Manufacturer:
MIC
Quantity:
6 243
REGISTER 15-2: SSPCON1: SYNC SERIAL PORT CONTROL REGISTER1 (ADDRESS 11h, BANK 6)
2000 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3-0
Legend:
R = Readable bit
- n = Value at POR Reset
WCOL: Write Collision Detect bit
Master mode:
1 = A write to the SSPBUF register was attempted while the I
0 = No collision
Slave mode:
1 = The SSPBUF register is written while it is still transmitting the previous word (must be cleared
0 = No collision
SSPOV: Receive Overflow Indicator bit
In SPI mode:
1 = A new byte is received while the SSPBUF register is still holding the previous data. In case
0 = No overflow
In I
1 = A byte is received while the SSPBUF register is still holding the previous byte. SSPOV is a
0 = No overflow
SSPEN: Synchronous Serial Port Enable bit
In both modes, when enabled, these pins must be properly configured as input or output.
In SPI mode:
1 = Enables serial port and configures SCK, SDO, SDI and SS as the source of the serial port pins
0 = Disables serial port and configures these pins as I/O port pins
In I
1 = Enables the serial port and configures the SDA and SCL pins as the source of the serial port pins
0 = Disables serial port and configures these pins as I/O port pins
CKP: Clock Polarity Select bit
In SPI mode:
1 = Idle state for clock is a high level
0 = Idle state for clock is a low level
In I
SCK release control
1 = Enable clock
0 = Holds clock low (clock stretch). (Used to ensure data setup time.)
In I
Unused in this mode
SSPM3:SSPM0: Synchronous Serial Port Mode Select bits
0000 = SPI Master mode, clock = F
0001 = SPI Master mode, clock = F
0010 = SPI Master mode, clock = F
0011 = SPI Master mode, clock = TMR2 output/2
0100 = SPI Slave mode, clock = SCK pin, SS pin control enabled
0101 = SPI Slave mode, clock = SCK pin, SS pin control disabled, SS can be used as I/O pin
0110 = I
0111 = I
1000 = I
1xx1 = Reserved
1x1x = Reserved
bit 7
WCOL
R/W-0
Note:
2
2
2
2
transmission to be started
in software)
of overflow, the data in SSPSR is lost. Overflow can only occur in Slave mode. In Slave
mode, the user must read the SSPBUF, even if only transmitting data, to avoid setting
overflow. In Master mode, the overflow bit is not set, since each new reception (and
transmission) is initiated by writing to the SSPBUF register. (Must be cleared in software.)
“don’t care” in Transmit mode. (Must be cleared in software.)
C mode:
C mode:
C Slave mode:
C Master mode:
2
2
2
C Slave mode, 7-bit address
C Slave mode, 10-bit address
C Master mode, clock = F
In SPI mode, these pins must be properly configured as input or output.
SSPOV
R/W-0
SSPEN
R/W-0
W = Writable bit
’1’ = Bit is set
OSC
OSC
OSC
OSC
/4
/16
/64
/ (4 * (SSPADD+1) )
R/W-0
CKP
SSPM3
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
2
C conditions were not valid for a
SSPM2
R/W-0
PIC17C7XX
x = Bit is unknown
SSPM1
R/W-0
DS30289B-page 135
SSPM0
R/W-0
bit 0

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