PIC17C756-16/SP Microchip Technology, PIC17C756-16/SP Datasheet - Page 188

• Manufacturer Part Number: PIC17C756-16/SP
• Description: MICRO CTRL 16K MEMORY OTP 64SDIP
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17C756-16/SP

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-SDIP (0.750", 19.05mm)
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Other names: PIC17C756-16/P

PIC17C7XX
16.4.1
The ADRESH:ADRESL register pair is the location
where the 10-bit A/D result is loaded at the completion
of the A/D conversion. This register pair is 16-bits wide.
The A/D module gives the flexibility to left or right justify
the 10-bit result in the 16-bit result register. The A/D
Format Select bit (ADFM) controls this justification.
Figure 16-6 shows the operation of the A/D result justi-
fication. The extra bits are loaded with ’0’s’. When an A/
D result will not overwrite these locations (A/D disable),
these registers may be used as two general purpose 8-
bit registers.
16.5
The A/D module can operate during SLEEP mode. This
requires that the A/D clock source be set to RC
(ADCS1:ADCS0 = 11). When the RC clock source is
selected, the A/D module waits one instruction cycle
before starting the conversion. This allows the SLEEP
instruction to be executed, which eliminates all digital
switching noise from the conversion. When the conver-
sion is completed, the GO/DONE bit will be cleared,
and the result loaded into the ADRES register. If the A/
D interrupt is enabled, the device will wake-up from
FIGURE 16-6:
DS30289B-page 188
A/D Operation During SLEEP
A/D RESULT REGISTERS
7
0000 00
ADRESH
A/D RESULT JUSTIFICATION
Right Justified
2 1 0 7
ADFM = 1
RESULT
10-bits
ADRESL
0
10-Bit Result
SLEEP. If the A/D interrupt is not enabled, the A/D mod-
ule will then be turned off, although the ADON bit will
remain set.
When the A/D clock source is another clock option (not
RC), a SLEEP instruction will cause the present conver-
sion to be aborted and the A/D module to be turned off,
though the ADON bit will remain set.
Turning off the A/D places the A/D module in its lowest
current consumption state.
16.6
A device RESET forces all registers to their RESET
state. This forces the A/D module to be turned off, and
any conversion is aborted.
The value that is in the ADRESH:ADRESL registers is
not
ADRESH:ADRESL registers will contain unknown data
after a Power-on Reset.
Note:
7
modified
ADRESH
Effects of a RESET
RESULT
For the A/D module to operate in SLEEP,
the A/D clock source must be set to RC
(ADCS1:ADCS0 = 11). To allow the con-
version to occur during SLEEP, ensure the
SLEEP instruction immediately follows the
instruction that sets the GO/DONE bit.
10-bits
ADFM = 0
for
Left Justified
0 7 6 5
a
ADRESL
2000 Microchip Technology Inc.
0000 00
Power-on
0
Reset.
The