UPD70F3735GK-GAK-AX Renesas Electronics America, UPD70F3735GK-GAK-AX Datasheet - Page 757

• Manufacturer Part Number: UPD70F3735GK-GAK-AX
• Description: MCU 32BIT V850ES/JX3-L 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3735GK-GAK-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 8x10b, D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JF3-L
29.1.6 Cautions
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
(1) If a reset signal is input (from the target system or a reset signal from an internal reset source) during RUN
(2) Even if the reset signal is masked by the mask function, the I/O buffer (port pin) may be reset if a reset signal is
(3) Pin reset during a break is masked and the CPU and peripheral I/O are not reset. If pin reset or internal reset is
(4) In the on-chip debug mode, the DDO pin is forcibly set to the high-level output.
(5) On-chip debugging can be used when the supply voltage (V
(6) In the on-chip debug mode, the output voltage of the regulator does not decrease even in the low-voltage STOP
(program execution), the break function may malfunction.
input from a pin.
generated as soon as the flash memory is rewritten by DMM or read by the RAM monitor function while the user
program is being executed, the CPU and peripheral I/O may not be correctly reset.
less than 2.7 V.
mode, low-voltage subclock operation mode, or low-voltage sub-IDLE mode
DD
CHAPTER 29 ON-CHIP DEBUG FUNCTION
) is in a range of 2.7 to 3.6 V. It cannot be used at
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