UPD70F3735GK-GAK-AX Renesas Electronics America, UPD70F3735GK-GAK-AX Datasheet - Page 256

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UPD70F3735GK-GAK-AX

Manufacturer Part Number
UPD70F3735GK-GAK-AX
Description
MCU 32BIT V850ES/JX3-L 80-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3735GK-GAK-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
66
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 8x10b, D/A 1x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3735GK-GAK-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JF3-L
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
Figure 7-32. Software Processing Flow in Free-Running Timer Mode (Compare Function) (2/2)
Remark
n = 0 to 2, 5
<1> Count operation start flow
<2> Overflow flag clear flow
<3> Count operation stop flow
(TPnCKS0 to TPnCKS2 bits)
TPnOVF bit (CLR TPnOVF).
Execute instruction to clear
Read TPnOPT0 register
Register initial setting
(check overflow flag).
TPnCCR0 register,
TPnOPT0 register,
TPnCTL1 register,
TPnIOC0 register,
TPnIOC2 register,
TPnCCR1 register
TPnCTL0 register
TPnOVF bit = 1
TPnCE bit = 1
TPnCE bit = 0
START
STOP
YES
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
NO
Counter is initialized and
counting is stopped by
clearing TPnCE bit to 0.
Initial setting of these registers
is performed before the TPnCE
bit is set to 1.
The TPnCKS0 to TPnCKS2 bits
can be set when counting starts
(TPnCE bit = 1).
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