DF3048BVX25WV Renesas Electronics America, DF3048BVX25WV Datasheet - Page 620

• Manufacturer Part Number: DF3048BVX25WV
• Description: MCU 3/5V 128K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3048BVX25WV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 18 ROM (H8/3048F-ONE: Single Power Supply, H8/3048B Mask ROM Version)
18.6
When pins are set to on-board programming mode and a reset-start is executed, a transition is
made to the on-board programming state in which program/erase/verify operations can be
performed on the on-chip flash memory. There are two on-board programming modes: boot mode
and user program mode. The pin settings for transition to each of these modes are shown in table
18.6. For a diagram of the transitions to the various flash memory modes, see figure 18.2.
Table 18.6 Setting On-Board Programming Modes
Mode
Boot mode
User program mode
Notes: 1. (1) For the high-level application timing, see Notes on Use of Boot Mode.
Rev. 3.00 Sep 27, 2006 page 592 of 872
REJ09B0325-0300
ROM blocks
EB0–EB3
(H'000000–
H'000FFF)
2. Never apply 12 V to the H8/3048F-ONE (single power supply). If do so, the LSI will be
3. For pins RXD1 and TXD1, use on-board pull-up.
Flash Memory On-Board Programming Modes
(2) In boot mode, the inverse of the MD
(3) In boot mode, the mode control register (MDCR) can be used to monitor the status
permanently damaged.
of modes 5, 6, and 7, in the same way as in normal mode.
H'0003FF
H'0007FF
H'000BFF
H'000C00
H'000FFF
H'000000
H'000400
H'000800
Figure 18.6 Example of ROM Area/RAM Area Overlap
Mode 5
Mode 6
Mode 7
Mode 5
Mode 6
Mode 7
Mapping RAM
ROM area
EB0
EB1
EB2
EB3
FWE *
1 *
1
ROM selection
area
RAM selection
area
2
MD2 *
0 *
0 *
0 *
1 *
1 *
1 *
1
1
1
1
1
1
2
setting should be input.
2
MD1
0
1
1
0
1
1
Actual RAM
RAM area
MD0
1
0
1
1
0
1
H'FFEFFF
H'FFEF10
H'FFF3FF
H'FFFF0F
H'FFF000
H'FFF400
RxD1
1 *
1 *
1 *
0/1
0/1
0/1
3
3
3
RAM
overlap area
(H'FFF000–
H'FFF3FF)
Notes
0: V
1: V
IL
IH