DF3048BVX25WV Renesas Electronics America, DF3048BVX25WV Datasheet - Page 130
![MCU 3/5V 128K PB-FREE 100-TQFP](/photos/28/61/286123/100-tqfp__100-vqfp_sml.jpg)
DF3048BVX25WV
Manufacturer Part Number
DF3048BVX25WV
Description
MCU 3/5V 128K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3048BVX25WV
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF3048BVX25WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 130 of 903
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Section 5 Interrupt Controller
5.2.3
ISR is an 8-bit readable/writable register that indicates the status of IRQ
requests.
ISR is initialized to H'00 by a reset and in hardware standby mode.
Bits 7 and 6—Reserved: Read-only bits, always read as 0.
Bits 5 to 0—IRQ
IRQ
Bits 5 to 0:
IRQ5F to IRQ0F
0
1
Note: n = 5 to 0
Rev. 3.00 Sep 27, 2006 page 102 of 872
REJ09B0325-0300
Bit
Initial value
Read/Write
Note: * Only 0 can be written, to clear flags.
0
interrupt requests.
IRQ Status Register (ISR)
5
to IRQ
Reserved bits
Description
[Clearing conditions]
0 is written in IRQnF after reading the IRQnF flag when IRQnF = 1.
IRQnSC = 0, IRQn input is high, and interrupt exception handling is carried out.
IRQnSC = 1 and IRQn interrupt exception handling is carried out.
[Setting conditions]
IRQnSC = 0 and IRQn input is low.
IRQnSC = 1 and IRQn input changes from high to low.
7
0
0
Flags (IRQ5F to IRQ0F): These bits indicate the status of IRQ
6
0
IRQ5F
R/(W) *
5
0
IRQ4F
R/(W) *
4
0
IRQ to IRQ flags
These bits indicate IRQ to IRQ
interrupt request status
IRQ3F
R/(W) *
3
0
5
IRQ2F
R/(W) *
0
2
0
0
to IRQ
IRQ1F
R/(W) *
5
5
1
0
interrupt
(Initial value)
IRQ0F
R/(W) *
0
0
0
5
to
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