DF3048BVX25WV Renesas Electronics America, DF3048BVX25WV Datasheet - Page 248

MCU 3/5V 128K PB-FREE 100-TQFP

DF3048BVX25WV

Manufacturer Part Number
DF3048BVX25WV
Description
MCU 3/5V 128K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3048BVX25WV

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3048BVX25WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 8 DMA Controller
8.4
8.4.1
Table 8.5 summarizes the DMAC modes.
Table 8.5
Transfer Mode
Short address
mode
Full address
mode
A summary of operations in these modes follows.
I/O Mode
One byte or word is transferred per request. A designated number of these transfers are executed.
A CPU interrupt can be requested at completion of the designated number of transfers. One 24-bit
address and one 8-bit address are specified. The transfer direction is determined automatically
from the activation source.
Idle Mode
One byte or word is transferred per request. A designated number of these transfers are executed.
A CPU interrupt can be requested at completion of the designated number of transfers. One 24-bit
address and one 8-bit address are specified. The addresses are held fixed. The transfer direction is
determined automatically from the activation source.
Rev. 3.00 Sep 27, 2006 page 220 of 872
REJ09B0325-0300
Operation
Overview
DMAC Modes
I/O mode
Idle mode
Repeat mode
Normal mode
Block transfer
mode
Activation
Compare match/input
capture A interrupt from
ITU channels 0 to 3
Transmit-data-empty and
receive-data-full interrupts
from SCI channel 0
External request
Auto-request
External request
Compare match/input
capture A interrupt from ITU
channels 0 to 3
External request
Notes
Up to four channels can
operate independently
Only the B channels
support external requests
A and B channels are
paired; up to two channels
are available
Burst mode or cycle-steal
mode can be selected for
auto-requests

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