DF3048BVX25WV Renesas Electronics America, DF3048BVX25WV Datasheet - Page 367
![MCU 3/5V 128K PB-FREE 100-TQFP](/photos/28/61/286123/100-tqfp__100-vqfp_sml.jpg)
DF3048BVX25WV
Manufacturer Part Number
DF3048BVX25WV
Description
MCU 3/5V 128K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3048BVX25WV
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF3048BVX25WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 367 of 903
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10.2.5
TOER is an 8-bit readable/writable register that enables or disables output settings for channels 3
and 4.
TOER is initialized to H'FF by a reset and in standby mode.
Bits 7 and 6—Reserved: Read-only bits, always read as 1.
Bit 5—Master Enable TOCXB4 (EXB4): Enables or disables ITU output at pin TOCXB
Bit 4—Master Enable TOCXA4 (EXA4): Enables or disables ITU output at pin TOCXA
Bit 5: EXB4
0
1
Bit 4: EXA4
0
1
Bit
Initial value
Read/Write
Timer Output Master Enable Register (TOER)
Reserved bits
Description
TOCXB
a generic input/output pin).
If XTGD = 0, EXB4 is cleared to 0 when input capture A occurs in channel 1.
TOCXB
Description
TOCXA
a generic input/output pin).
If XTGD = 0, EXA4 is cleared to 0 when input capture A occurs in channel 1.
TOCXA
7
1
4
4
4
4
output is disabled regardless of TFCR settings (TOCXB
is enabled for output according to TFCR settings
output is disabled regardless of TFCR settings (TOCXA
is enabled for output according to TFCR settings
6
1
Master enable TOCXA4, TOCXB4
These bits enable or disable output
settings for pins TOCXA
EXB4
R/W
5
1
Master enable TIOCA3, TIOCB3 , TIOCA4, TIOCB4
These bits enable or disable output settings for pins
TIOCA
EXA4
R/W
3
4
1
, TIOCB
Section 10 16-Bit Integrated Timer Unit (ITU)
4
Rev. 3.00 Sep 27, 2006 page 339 of 872
and TOCXB
EB3
R/W
3
3
1
, TIOCA
EB4
R/W
4
4
, and TIOCB
2
1
R/W
EA4
REJ09B0325-0300
1
1
4
4
4
operates as
(Initial value)
operates as
(Initial value)
EA3
R/W
4
0
1
4
.
.
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