D12350F20IV Renesas Electronics America, D12350F20IV Datasheet - Page 641

• Manufacturer Part Number: D12350F20IV
• Description: IC H8S/2350 MCU 4.5/5.5V 0+K I-T
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12350F20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Table 13.12 SCI Interrupt Sources
Note:
A TEI interrupt is requested when the TEND flag is set to 1 while the TEIE bit is set to 1. The
TEND flag is cleared at the same time as the TDRE flag. Consequently, if a TEI interrupt and a
TXI interrupt are requested simultaneously, the TXI interrupt may have priority for acceptance,
with the result that the TDRE and TEND flags are cleared. Note that the TEI interrupt will not be
accepted in this case.
Channel
0
1
* This table shows the initial state immediately after a reset. Relative priorities among
Interrupt
Source
ERI
RXI
TXI
TEI
ERI
RXI
TXI
TEI
channels can be changed by means of the interrupt controller.
Description
Interrupt due to receive error
(ORER, FER, or PER)
Interrupt due to receive data full
state (RDRF)
Interrupt due to transmit data empty
state (TDRE)
Interrupt due to transmission end
(TEND)
Interrupt due to receive error
(ORER, FER, or PER)
Interrupt due to receive data full
state (RDRF)
Interrupt due to transmit data empty
state (TDRE)
Interrupt due to transmission end
(TEND)
Section 13 Serial Communication Interface (SCI)
Rev. 3.00 Sep 15, 2006 page 605 of 988
DTC
Activation
Not
possible
Possible
Possible
Not
possible
Not
possible
Possible
Possible
Not
possible
DMAC
Activation
Not
possible
Possible
Possible
Not
possible
Not
possible
Possible
Possible
Not
possible
REJ09B0330-0300
Priority *
High
Low