D12350F20IV Renesas Electronics America, D12350F20IV Datasheet - Page 553

IC H8S/2350 MCU 4.5/5.5V 0+K I-T

D12350F20IV

Manufacturer Part Number
D12350F20IV
Description
IC H8S/2350 MCU 4.5/5.5V 0+K I-T
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12350F20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12350F20IV
Manufacturer:
INF
Quantity:
4 834
Bit 3—Group 3 Non-Overlap (G3NOV): Selects normal or non-overlapping operation for pulse
output group 3 (pins PO15 to PO12).
Bit 2—Group 2 Non-Overlap (G2NOV): Selects normal or non-overlapping operation for pulse
output group 2 (pins PO11 to PO8).
Bit 1—Group 1 Non-Overlap (G1NOV): Selects normal or non-overlapping operation for pulse
output group 1 (pins PO7 to PO4).
Bit 0—Group 0 Non-Overlap (G0NOV): Selects normal or non-overlapping operation for pulse
output group 0 (pins PO3 to PO0).
Bit 3
G3NOV
0
1
Bit 2
G2NOV
0
1
Bit 1
G1NOV
0
1
Bit 0
G0NOV
0
1
Description
Normal operation in pulse output group 3 (output values updated at compare match A
in the selected TPU channel)
Non-overlapping operation in pulse output group 3 (independent 1 and 0 output at
compare match A or B in the selected TPU channel)
Description
Normal operation in pulse output group 2 (output values updated at compare match A
in the selected TPU channel)
Non-overlapping operation in pulse output group 2 (independent 1 and 0 output at
compare match A or B in the selected TPU channel)
Description
Normal operation in pulse output group 1 (output values updated at compare match A
in the selected TPU channel)
Non-overlapping operation in pulse output group 1 (independent 1 and 0 output at
compare match A or B in the selected TPU channel)
Description
Normal operation in pulse output group 0 (output values updated at compare match A
in the selected TPU channel)
Non-overlapping operation in pulse output group 0 (independent 1 and 0 output at
compare match A or B in the selected TPU channel)
Section 11 Programmable Pulse Generator (PPG)
Rev. 3.00 Sep 15, 2006 page 517 of 988
REJ09B0330-0300
(Initial value)
(Initial value)
(Initial value)
(Initial value)

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