DF36034HJV Renesas Electronics America, DF36034HJV Datasheet - Page 120
DF36034HJV
Manufacturer Part Number
DF36034HJV
Description
MCU 3/5V 32K J-TEMP PB-FREE 64-Q
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Specifications of DF36034HJV
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Section 6 Power-Down Modes
6.3
Operation in active mode is clocked at the frequency designated by the MA2, MA1, and MA0 bits
in SYSCR2. The operating frequency changes to the set frequency after SLEEP instruction
execution.
6.4
The CPU can execute programs in two modes: active and subactive modes. A direct transition is a
transition between these two modes without stopping program execution. A direct transition can
be made by executing a SLEEP instruction while the DTON bit in SYSCR2 is set to 1. The direct
transition also enables operating frequency modification in active or subactive mode. After the
mode transition, direct transition interrupt exception handling starts.
If the direct transition interrupt is disabled in interrupt enable register 1, a transition is made
instead to sleep or subsleep mode. Note that if a direct transition is attempted while the I bit in
CCR is set to 1, sleep or subsleep mode will be entered, and the resulting mode cannot be cleared
by means of an interrupt.
6.4.1
The time from the start of SLEEP instruction execution to the end of interrupt exception handling
(the direct transition time) is calculated by equation (1).
Direct transition time = {(number of SLEEP instruction execution states) + (number of internal
processing states)} (tcyc before transition) + (number of interrupt exception handling states)
(tsubcyc after transition)
Rev. 4.00 Mar. 15, 2006 Page 86 of 556
REJ09B0026-0400
Example:
Direct transition time = (2 + 1) tosc + 14 8tw = 3tosc + 112tw
(when the CPU operating clock of
[Legend]
tosc: OSC clock cycle time
tw: Watch clock cycle time
tcyc: System clock ( ) cycle time
tsubcyc: Subclock (
Operating Frequency in Active Mode
Direct Transition
Direct Transition from Active Mode to Subactive Mode
SUB
) cycle time
(1)
osc
w
/8 is selected)
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