DF36034HJV Renesas Electronics America, DF36034HJV Datasheet - Page 102

• Manufacturer Part Number: DF36034HJV
• Description: MCU 3/5V 32K J-TEMP PB-FREE 64-Q
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of DF36034HJV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SSU
• Peripherals: PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 4 Address Break
4.1
The address break has the following registers.
4.1.1
ABRKCR sets address break conditions.
Rev. 4.00 Mar. 15, 2006 Page 68 of 556
REJ09B0026-0400
Bit
7
6
5
4
3
2
Address break control register (ABRKCR)
Address break status register (ABRKSR)
Break address register (BARH, BARL)
Break data register (BDRH, BDRL)
Bit Name
RTINTE
CSEL1
CSEL0
ACMP2
ACMP1
ACMP0
Register Descriptions
Address Break Control Register (ABRKCR)
Initial
Value
1
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
RTE Interrupt Enable
When this bit is 0, the interrupt immediately after
executing RTE is masked and then one instruction must
be executed. When this bit is 1, the interrupt is not
masked.
Condition Select 1 and 0
These bits set address break conditions.
00: Instruction execution cycle
01: CPU data read cycle
10: CPU data write cycle
11: CPU data read/write cycle
Address Compare Condition Select 2 to 0
These bits set the comparison condition between the
address set in BAR and the internal address bus.
000: Compares 16-bit addresses
001: Compares upper 12-bit addresses
010: Compares upper 8-bit addresses
011: Compares upper 4-bit addresses
1XX: Reserved (setting prohibited)