M30800SAGP#U5 Renesas Electronics America, M30800SAGP#U5 Datasheet - Page 73

• Manufacturer Part Number: M30800SAGP#U5
• Description: IC M32C/80 MCU ROMLESS 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30800SAGP#U5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

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E
3
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2
Figure 7.9 Recovery Cycle
0
C
1
9
0 .
8 /
B
0
0
0
7.2.4.1 Bus Cycle with Recovery Cycle Added
2
7
G
The EWCRi06 bit in the EWCRi register (i=0 to 3) determines whether the recovery cycle is added or not.
In the recovery cycle, addresses and wrie data outputs are provided continuously (using the separate bus
only). Devices, which take longer address hold time and data hold time to write data, are connectable.
N
1
o
o r
0 -
. v
u
1
p
0
0
, 1
0
2
0
0
5
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• Recovery Cycle with Separate Bus (For 1 + 2 )
• Recovery Cycle with Multiplexed Bus (For 2 + 3 )
i=0 to 3
NOTE:
A : Address
WR, WRL, WRH
1. When the microcomputer continuously accesses the same CS area,
the CSi pin outputs an "L" signal continuously.
Data (Read)
Data (Write)
Data (Read)
Data (Write)
WR (WRL)
f o
Address
BCLK
BCLK
CS
CS
RD
3
ALE
RD
LA : Latch Address
3
i
i
(1)
(1)
0
LA
LA
A
WD
RD : Read Data
RD
WD
RD
Recovery Cycle
<--- Hold an Address
<--- Hold Data
WD : Write Data
Recovery Cycle
<--- Hold Data
7. Bus