M30800SAGP#U5 Renesas Electronics America, M30800SAGP#U5 Datasheet - Page 344

IC M32C/80 MCU ROMLESS 100LQFP

M30800SAGP#U5

Manufacturer Part Number
M30800SAGP#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M30800SAGP#U5

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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M
R
R
24.10 A/D Converter
e
E
3
. v
J
2
Figure 24.4 Use of Capacitors to Reduce Noise
0
C
1
9
8 /
0 .
B
• Set the AD0CON0 (bit 6 excluded), AD0CON1, AD0CON2, AD0CON3, and AD0CON4 registers while
• Wait a minimum of 1 s before starting the A/D conversion when changing the VCUT bit setting in the
• Insert capacitors between the AV
• Set the bit in the port direction register, which corresponds to the pin being used as the analog input, to
• When generating a key input interrupt, do not use the AN
• The
• Set the CH2 to CH0 bits in the AD0CON0 register or the SCAN1 and SCAN0 bits in the AD0CON1
0
0
0
Change the VCUT bit setting from "1" to "0" after the A/D conversion is completed.
the A/D conversion is stopped (before a trigger is generated).
AD0CON1 register from "0" (V
prevent latch-ups and malfunctions due to noise, and to minimize conversion errors. The same applies
to the V
"0" (input mode). Set the bit in the port direction register, which corresponds to the AD
(input mode) if the TRG bit in the AD0CON0 register is set to "1" (external trigger).
interrupt request is generated when the A/D input voltage becomes "L").
2
frequency must be 250 kHz or more. If the sample and hold function is activated, the
must be 1MHz or more.
register to re-select analog input pins when changing A/D conversion mode.
G
7
N
1
o r
o
0 -
. v
u
AD
1
p
0
0
CC
, 1
0
frequency must be 16MHz or less. When the sample and hold function is not activated, the
2
and V
0
0
5
Page 323
SS
NOTES:
pins. Figure 24.4 shows the use of capacitors to reduce noise.
1. C1 0.47µF, C2 0.47µF, C3 100pF, C4 0.1µF, C5 0.1µF (reference)
2. Use thick and shortest possible wiring to connect capacitors.
V
V
CC1
CC2
ANi: ANi, AN
f o
C4
C5
3
3
REF
0
Microcomputer
0
no connection) to "1" (V
CC
i, AN
V
V
V
V
SS
SS
CC
CC
pin, V
15
i and AN
REF
AV
AV
V
ANi
REF
2
pin, analog input pin ANi (i=0 to 7) and AV
CC
SS
i (i=0 to 7)
C1
4
REF
to AN
V
CC1
C2
connection).
7
C3
pins as analog input pins (key input
24. Precautions (A/D Converter)
__________
TRG
AD
frequency
pin, to "0"
SS
pin to
AD

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