MCF51EM128CLK Freescale Semiconductor, MCF51EM128CLK Datasheet - Page 341

• Manufacturer Part Number: MCF51EM128CLK
• Description: IC MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51EMr

Specifications of MCF51EM128CLK

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x16b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Processor Series: MCF51EM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: RS-232, LIN
• Maximum Clock Frequency: 50 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

15.2.2
The bidirectional SDA is the serial data line of the IIC system.
15.3
15.3.1
The IIC has ten 8-bit registers. The base address of the module is hardware programmable. The IIC register
map is fixed and begins at the module’s base address.
space. The following section describes the bit-level arrangement and functionality of each register.
This section consists of the IIC register descriptions in address order.
Refer to the direct-page register summary in the
assignments for all IIC registers. This section refers to registers and control bits only by their names. A
Freescale-provided equate or header file is used to translate these names into the appropriate absolute
addresses.
15.3.2
Freescale Semiconductor
Reset
W
R
Register Definition
SDA — Serial Data Line
Module Memory Map
IIC Address Register 1 (IICA1)
AD7
Base + $000A
Base + $0000
Base + $0001
Base + $0002
Base + $0003
Base + $0004
Base + $0005
Base + $0006
Base + $0007
Base + $0008
Base + $0009
0
7
Address
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
= Unimplemented or Reserved
AD6
0
6
SMBUS IIC Control and Status Register (IICSMB)
IIC SCL Low Time Out Register High (IICSLTH)
IIC SCL Low Time Out Register Low (IICSLTL)
Figure 15-2. IIC Address Register 1 (IICA1)
IIC Frequency Divider Register (IICF)
IIC input programmable filter (IICFLT)
IIC Address Register 1 (IICA1)
IIC Address Register 2 (IICA2)
IIC Control Register 1 (IICC1)
IIC Control Register 2 (IICC2)
Table 15-1. Module Memory Map
AD5
IIC Data IO Register (IICD)
IIC Status Register (IICS)
0
5
Use
Chapter 3, “Memory,”
AD4
0
4
Table 15-1
AD3
3
0
summarizes the IIC module’s address
for the absolute address
AD2
0
2
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
Access
read
Inter-Integrated Circuit (IIC)
AD1
0
1
0
0
0
15-3