MCF51EM128CLK Freescale Semiconductor, MCF51EM128CLK Datasheet - Page 290

IC MCU 32BIT 128KB FLASH 80LQFP

MCF51EM128CLK

Manufacturer Part Number
MCF51EM128CLK
Description
IC MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51EMr
Datasheets

Specifications of MCF51EM128CLK

Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SCI, SPI
Peripherals
LCD, LVD, PWM, WDT
Number Of I /o
56
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x16b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Processor Series
MCF51EM
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
RS-232, LIN
Maximum Clock Frequency
50 MHz
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF51EM128CLK
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
BUS RATE
16-Bit Serial Peripheral Interface (SPI16)
When the SPI is configured as a slave, the SPSCK pin is routed to the clock input of the SPI, the shifter
output is routed to MISO, and the shifter input is routed from the MOSI pin.
In the external SPI system, simply connect all SPSCK pins to each other, all MISO pins together, and all
MOSI pins together. Peripheral devices often use slightly different names for these pins.
13.2
The SPI optionally shares four port pins. The function of these pins depends on the settings of SPI control
bits. When the SPI is disabled (SPE = 0), these four pins revert to being general-purpose port I/O pins that
are not controlled by the SPI.
13-4
CLOCK
FIFOMODE-
SPI SYSTEM
SPIMODE
ENABLE
LSBFE
MSTR
SPE
RNFULLF
RNFULLIEN
TNEAREF
CLOCK GENERATOR
TNEARIEN
External Signal Description
SPIBR
MASTER/SLAVE
MODE SELECT
MCF51EM256 Series ColdFire Integrated Microcontroller Reference Manual, Rev. 8
SHIFT
OUT
8 OR 16
BIT MODE
SHIFT
DIRECTION
Tx BUFFER (WRITE SPIxDH:SPIxDL)
Rx BUFFER (READ SPIxDH:SPIxDL)
MODE FAULT
DETECTION
CLOCK
CLOCK
LOGIC
SHIFT
Rx FIFO (8byte deep)
Tx FIFO (8byte deep)
SPI SHIFT REGISTER
MODF
Figure 13-2. SPI Module Block Diagram
Rx BUFFER
SPRF
FULL
Tx BUFFER
EMPTY
SHIFT
SPTEF
SPTIE
SPIE
IN
MASTER CLOCK
SLAVE CLOCK
16-BIT COMPARATOR
BIDIROE
MODFEN
SPC0
SSOE
SPIxMH:SPIxML
16-BIT LATCH
PIN CONTROL
M
S
M
S
M
S
MASTER/
SLAVE
SPMF
SPMIE
Freescale Semiconductor
SPI
INTERRUPT
REQUEST
MOSI
(MOMI)
MISO
(SISO)
SPSCK
SS

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