DF2210CUNP24V Renesas Electronics America, DF2210CUNP24V Datasheet - Page 496

• Manufacturer Part Number: DF2210CUNP24V
• Description: MCU 16BIT FLASH 3V 32K 64-QFN
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2210CUNP24V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

12.9
12.9.1
Table 12.12 shows the interrupt sources in normal serial communication interface mode. A
different interrupt vector is assigned to each interrupt source, and individual interrupt sources can
be enabled or disabled using the enable bits in SCR.
When the TDRE flag in SSR is set to 1, a TXI interrupt request is generated. When the TEND flag
in SSR is set to 1, a TEI interrupt request is generated. A TXI interrupt can activate the DMAC to
perform data transfer. The TDRE flag is cleared to 0 automatically when data is transferred by the
DMAC.
When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated. When the ORER,
PER, or FER flag in SSR is set to 1, an ERI interrupt request is generated. An RXI interrupt
request can activate the DMAC to transfer data. The RDRF flag is cleared to 0 automatically when
data is transferred by the DMAC.
A TEI interrupt is requested when the TEND flag is set to 1 and the TEIE bit is set to 1. If a TEI
interrupt and a TXI interrupt are requested simultaneously, the TXI interrupt has priority for
acceptance. However, if the TDRE and TEND flags are cleared simultaneously by the TXI
interrupt routine, the SCI cannot branch to the TEI interrupt routine later.
Table 12.12 SCI Interrupt Sources
Note: * This table shows the initial state immediately after a reset. The relative channel priorities
Rev.7.00 Dec. 24, 2008 Page 440 of 698
REJ09B0074-0700
Channel Name
0
2
can be changed by the interrupt controller.
Interrupts
Interrupts in Normal Serial Communication Interface Mode
ERI0
RXI0
TXI0
TEI0
ERI2
RXI2
TXI2
TEI2
Interrupt Source
Receive Error
Receive Data Full
Transmit Data Empty
Transmission End
Receive Error
Receive Data Full
Transmit Data Empty
Transmission End
Interrupt Flag
ORER, FER, PER
RDRF
TDRE
TEND
ORER, FER, PER
RDRF
TDRE
TEND
DMAC Activation Priority*
Not possible
Possible
Possible
Not possible
Not possible
Not possible
Not possible
Not possible
High
Low