HD64F3672FPIV Renesas Electronics America, HD64F3672FPIV Datasheet - Page 25

MCU 3/5V 16K I-TEMP PB-FREE 64-L

HD64F3672FPIV

Manufacturer Part Number
HD64F3672FPIV
Description
MCU 3/5V 16K I-TEMP PB-FREE 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of HD64F3672FPIV

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 1 Overview
Table 1.1
Section 2 CPU
Table 2.1
Table 2.2
Table 2.3
Table 2.3
Table 2.4
Table 2.5
Table 2.6
Table 2.6
Table 2.7
Table 2.8
Table 2.9
Table 2.10
Table 2.11
Table 2.12
Table 2.12
Section 3 Exception Handling
Table 3.1
Table 3.2
Section 4 Address Break
Table 4.1
Section 5 Clock Pulse Generators
Table 5.1
Section 6 Power-Down Modes
Table 6.1
Table 6.2
Table 6.3
Section 7 ROM
Table 7.1
Table 7.2
Table 7.3
Table 7.4
Pin Functions ............................................................................................................ 5
Operation Notation ................................................................................................. 16
Data Transfer Instructions....................................................................................... 17
Arithmetic Operations Instructions (1) ................................................................... 18
Arithmetic Operations Instructions (2) ................................................................... 19
Logic Operations Instructions................................................................................. 20
Shift Instructions..................................................................................................... 20
Bit Manipulation Instructions (1)............................................................................ 21
Bit Manipulation Instructions (2)............................................................................ 22
Branch Instructions ................................................................................................. 23
System Control Instructions.................................................................................... 24
Block Data Transfer Instructions ............................................................................ 25
Addressing Modes .................................................................................................. 27
Absolute Address Access Ranges ........................................................................... 29
Effective Address Calculation (1)........................................................................... 30
Effective Address Calculation (2)........................................................................... 31
Exception Sources and Vector Address .................................................................. 42
Interrupt Wait States ............................................................................................... 51
Access and Data Bus Used ..................................................................................... 57
Crystal Resonator Parameters ................................................................................. 66
Operating Frequency and Waiting Time................................................................. 71
Transition Mode after SLEEP Instruction Execution and Interrupt Handling ........ 75
Internal State in Each Operating Mode................................................................... 75
Setting Programming Modes .................................................................................. 83
Boot Mode Operation ............................................................................................. 85
System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate is
Possible ................................................................................................................... 86
Reprogram Data Computation Table ...................................................................... 89
Tables
Rev.4.00 Nov. 02, 2005 Page xxiii of xxiv

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