HD64F3672FPIV Renesas Electronics America, HD64F3672FPIV Datasheet - Page 198

MCU 3/5V 16K I-TEMP PB-FREE 64-L

HD64F3672FPIV

Manufacturer Part Number
HD64F3672FPIV
Description
MCU 3/5V 16K I-TEMP PB-FREE 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of HD64F3672FPIV

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 13 Serial Communication Interface 3 (SCI3)
13.3.8
BRR is an 8-bit register that adjusts the bit rate. The initial value of BRR is H'FF. Table 13.2
shows the relationship between the N setting in BRR and the n setting in bits CKS1 and CKS0 of
SMR in asynchronous mode. Table 13.3 shows the maximum bit rate for each frequency in
asynchronous mode. The values shown in both tables 13.2 and 13.3 are values in active (high-
speed) mode. Table 13.4 shows the relationship between the N setting in BRR and the n setting in
bits CKS1 and CKS0 in SMR in clocked synchronous mode. The values shown in table 13.4 are
values in active (high-speed) mode. The N setting in BRR and error for other operating
frequencies and bit rates can be obtained by the following formulas:
[Asynchronous Mode]
[Clocked Synchronous Mode]
Note: B: Bit rate (bit/s)
Rev.4.00 Nov. 02, 2005 Page 172 of 304
REJ09B0143-0400
N: BRR setting for baud rate generator (0 N 255)
n: CKS1 and CKS0 setting for SMR (0
: Operating frequency (MHz)
Bit Rate Register (BRR)
Error (%) =
N =
N =
(N + 1)
64
8
2
2
2n–1
2n–1
B
10
N 3)
64
B
6
B
2
10
10
2n–1
6
6
– 1
– 1
– 1
100

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