MCHC908JW32FAE Freescale Semiconductor, MCHC908JW32FAE Datasheet - Page 31
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MCHC908JW32FAE
Manufacturer Part Number
MCHC908JW32FAE
Description
IC MCU 32K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.RD3152MMA7260Q.pdf
(232 pages)
Specifications of MCHC908JW32FAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, USB
Peripherals
LED, LVD, POR, PWM
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
48
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
1
Embedded Interface Type
SPI
Rohs Compliant
Yes
Processor Series
HC08JW
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USB
Number Of Programmable I/os
29
Number Of Timers
2
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCHC908JW32FAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCHC908JW32FAE
Manufacturer:
FREESCALE
Quantity:
20 000
Freescale Semiconductor
$005A
$005B
$005C
$005D
$0051
$0052
$0053
$0054
$0055
$0056
$0057
$0058
$0059
Addr.
USB EP1 Data Size Register
USB EP2 Data Size Register
USB EP3 Data Size Register
USB EP4 Data Size Register
USB Status Interrupt Mask
USB EP 1/2 Base Pointer
USB EPO Control/Status
USB EP1 Control/Status
USB EP2 Control/Status
USB EP3 Control/Status
USB EP4 Control/Status
Register Name
USB Control Register
Register (UEP0CSR)
Register (UEP1CSR)
Register (UEP2CSR)
Register (UEP3CSR)
USB Status Register
Register (USIMR)
(UEP12BPR)
(UEP4CSR)
(UEP1DSR)
(UEP2DSR)
(UEP3DSR)
(UEP4DSR)
Figure 2-2. Control, Status, and Data Registers (Sheet 5 of 7)
(USBCR)
(USBSR)
Register
Register
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read: CONFIG
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
DSIZE3_OUT
DSIZE3_IN
USBEN
MODE1
MODE1
MODE1
MODE1
Bit 7
MC68HC908JW32 Data Sheet, Rev. 6
0
0
0
0
0
0
0
0
0
0
0
0
0
EP0_STALL
USBCLKEN
DSIZE2_OUT
= Unimplemented
DSIZE2_IN
BASE22
MODE0
MODE0
MODE0
MODE0
DSIZE6
DSIZE6
DSIZE6
DSIZE6
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSIZE1_OUT
SETUPIE
DSIZE1_IN
BASE21
TFC4IE
DSIZE5
DSIZE5
DSIZE5
DSIZE5
SETUP
STALL
STALL
STALL
STALL
5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSIZE0_OUT
DSIZE0_IN
BASE20
TFC3IE
DSIZE4
DSIZE4
DSIZE4
DSIZE4
SOFIE
SOF
DIR
DIR
DIR
DIR
R
4
0
0
0
0
0
0
0
0
0
0
0
0
0
CONFIG_CHG
= Reserved
CONFIG_
DVALID_IN
TFC2IE
DSIZE3
DSIZE3
DSIZE3
DSIZE3
CHGIE
SIZE1
SIZE1
SIZE1
SIZE1
3
0
0
0
0
0
0
0
0
0
0
0
0
0
USBRST
USBRE-
BASE12
TFC1IE
DSIZE2
DSIZE2
DSIZE2
DSIZE2
TFRC_IN
SETIE
SIZE0
SIZE0
SIZE0
SIZE0
2
0
0
0
0
0
0
0
0
0
0
0
0
0
U = Unaffected by reset
RESUMEF
DVALID_OUT
RESUME-
BASE11
DVALID
DVALID
DVALID
DVALID
DSIZE1
DSIZE1
DSIZE1
DSIZE1
TFC0IE
FIE
1
0
0
0
0
0
0
0
0
0
0
0
0
0
Monitor ROM
SUSPNDIE
RESUME
SUSPND
TFRC_OUT
BASE10
DSIZE0
DSIZE0
DSIZE0
DSIZE0
TFRC
TFRC
TFRC
TFRC
Bit 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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