MCHC908JW32FAE Freescale Semiconductor, MCHC908JW32FAE Datasheet - Page 116
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MCHC908JW32FAE
Manufacturer Part Number
MCHC908JW32FAE
Description
IC MCU 32K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.RD3152MMA7260Q.pdf
(232 pages)
Specifications of MCHC908JW32FAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, USB
Peripherals
LED, LVD, POR, PWM
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
48
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
1
Embedded Interface Type
SPI
Rohs Compliant
Yes
Processor Series
HC08JW
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USB
Number Of Programmable I/os
29
Number Of Timers
2
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCHC908JW32FAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCHC908JW32FAE
Manufacturer:
FREESCALE
Quantity:
20 000
Timer Interface Module (TIM)
TRST — TIM Reset Bit
PS[2:0] — Prescaler Select Bits
8.9.2 TIM Counter Registers
The two read-only TIM counter registers contain the high and low bytes of the value in the TIM counter.
Reading the high byte (TCNTH) latches the contents of the low byte (TCNTL) into a buffer. Subsequent
reads of TCNTH do not affect the latched TCNTL value until TCNTL is read. Reset clears the TIM counter
registers. Setting the TIM reset bit (TRST) also clears the TIM counter registers.
116
Setting this write-only bit resets the TIM counter and the TIM prescaler. Setting TRST has no effect on
any other registers. Counting resumes from $0000. TRST is cleared automatically after the TIM
counter is reset and always reads as logic 0. Reset clears the TRST bit.
These read/write bits select one of the seven prescaler outputs as the input to the TIM counter as
Table 8-2
1 = Prescaler and TIM counter cleared
0 = No effect
shows. Reset clears the PS[2:0] bits.
Address: $000C
Setting the TSTOP and TRST bits simultaneously stops the TIM counter at
a value of $0000.
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL by
reading TCNTL before exiting the break interrupt. Otherwise, TCNTL
retains the value latched during the break.
Reset:
Read:
Write:
PS2
0
0
0
0
1
1
1
1
Bit 15
Bit 7
0
Figure 8-5. TIM Counter Registers High (TCNTH)
PS1
0
0
1
1
0
0
1
1
= Unimplemented
14
6
0
MC68HC908JW32 Data Sheet, Rev. 6
Table 8-2. Prescaler Selection
PS0
0
1
0
1
0
1
0
1
13
5
0
NOTE
NOTE
12
4
0
Internal bus clock ÷ 1
Internal bus clock ÷ 2
Internal bus clock ÷ 4
Internal bus clock ÷ 8
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
11
3
0
TIM Clock Source
TCLK1
10
2
0
1
9
0
Freescale Semiconductor
Bit 0
Bit 8
0