ST7FOXK1T6TR STMicroelectronics, ST7FOXK1T6TR Datasheet - Page 86
![IC MCU 8BIT 4K FLASH 20LQFP](/photos/27/13/271337/tqfp-32_sml.jpg)
ST7FOXK1T6TR
Manufacturer Part Number
ST7FOXK1T6TR
Description
IC MCU 8BIT 4K FLASH 20LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FOXF1M6.pdf
(226 pages)
Specifications of ST7FOXK1T6TR
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
ST7FOXx
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 1 Channel
For Use With
497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST7FOXK1T6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
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On-chip peripherals
Note:
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2
3
1
Figure 39. PWM signal from 0% to 100% duty cycle
Dead time generation
A dead time can be inserted between PWM0 and PWM1 using the DTGR register. This is
required for half-bridge driving where PWM signals must not be overlapped. The non-
overlapping PWM0/PWM1 signals are generated through a programmable dead time by
setting the DTE bit.
DTGR[7:0] is buffered inside so as to avoid deforming the current PWM cycle. The DTGR
effect will take place only after an overflow.
Dead time is generated only when DTE=1 and DT[6:0]
PWM output signals will be at their reset state.
Half Bridge driving is possible only if polarities of PWM0 and PWM1 are not inverted, i.e. if
OP0 and OP1 are not set. If polarity is inverted, overlapping PWM0/PWM1 signals will be
generated.
Dead Time generation does not work at 1msec timebase.
DCRx=FFDh
DCRx=FFEh
DCRx=000h
DCRx=000h
COUNTER
f
COUNTER
FFDh
Dead time
FFEh
ATR= FFDh
FFFh
=
DT 6:0
[
FFDh
] Tcounter1
×
ST7FOXF1, ST7FOXK1, ST7FOXK2
≠
FFEh
0
.
If DTE is set and DT[6:0]=0,
FFFh
FFDh
FFEh
t
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