ST7FOXK1T6TR STMicroelectronics, ST7FOXK1T6TR Datasheet - Page 196

• Manufacturer Part Number: ST7FOXK1T6TR
• Description: IC MCU 8BIT 4K FLASH 20LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FOXK1T6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST7FOXx
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 1 Channel
• For Use With: 497-5049 - KIT STARTER RAISONANCE ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Electrical characteristics
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Figure 83. SPI slave timing diagram with CPHA=0
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
Figure 84. SPI slave timing diagram with CPHA=1
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration.
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration.
MISO
MOSI
MISO
MOSI
SS
CPHA=1
CPOL=0
CPHA=1
CPOL=1
OUTPUT
INPUT
INPUT
SS
CPHA=0
CPOL=0
CPHA=0
CPOL=1
OUTPUT
INPUT
INPUT
see
note 2
t
a(SO)
see note 2
t
su(SS)
HZ
t
a(SO)
t
su(SS)
t
t
t
w(SCKH)
w(SCKL)
su(SI)
t
su(SI)
MSB IN
t
t
MSB IN
w(SCKH)
w(SCKL)
MSB OUT
MSB OUT
t
h(SI)
t
t
h(SI)
c(SCK)
t
c(SCK)
t
v(SO)
t
v(SO)
DD
DD
BIT6 OUT
BIT6 OUT
and 0.7xV
and 0.7xV
ST7FOXF1, ST7FOXK1, ST7FOXK2
BIT1 IN
BIT1 IN
DD
DD
t
h(SO)
t
h(SO)
t
t
r(SCK)
f(SCK)
t
t
r(SCK)
f(SCK)
LSB IN
LSB OUT
LSB IN
LSB OUT
t
h(SS)
t
h(SS)
t
dis(SO)
t
dis(SO)
note 2
see
note 2
see