ST7FOXK1T6TR STMicroelectronics, ST7FOXK1T6TR Datasheet - Page 190

• Manufacturer Part Number: ST7FOXK1T6TR
• Description: IC MCU 8BIT 4K FLASH 20LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FOXK1T6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST7FOXx
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 1 Channel
• For Use With: 497-5049 - KIT STARTER RAISONANCE ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Electrical characteristics
12.3
12.3.1
12.3.2
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Operating conditions
General operating conditions
T
Table 69.
Operating conditions with Low Voltage Detector (LVD)
T
Table 70.
1. Not tested in production. The V
2. Use of LVD with capacitive power supply: with this type of power supply, if power cuts occur in the
A
A
,
Symbol
Symbol
V
I
V
DD(LVD)
V
= -40 to 85 °C unless otherwise specified.
IT+
= -40 to +85 °C unless otherwise specified.
f
IT-
and LVD reset release. When the V
reset of the MCU.
application, it is recommended to pull V
circuit example in
V
V
CPU
tPOR
hys
DD
(LVD)
(LVD)
LVD voltage threshold hysteresis
General operating conditions
Operating characteristics with LVD
CPU clock frequency
Reset generation threshold
LVD current consumption
Reset release threshold
V
Supply voltage
Figure 89 on page
DD
Parameter
rise time rate
Parameter
(V
(V
DD
DD
rise)
fall)
DD
rise time rate condition is needed to ensure a correct device power-on
DD
207.
(1)(2)
slope is outside these values, the LVD may not release properly the
DD
down to 0 V to ensure optimum restart conditions. Refer to
f
CPU
4.5 V≤ V
V
IT+
Conditions
Conditions
V
= 8 MHz max.
(LVD)
DD
= 5 V
DD
-V
ST7FOXF1, ST7FOXK1, ST7FOXK2
IT-
≤5.5 V
(LVD)
Min
3.9
3.7
2
Min
4.5
Typ
150
4.2
4.0
80
up to 8
Max
Max
5.5
140
4.5
4.3
MHz
Unit
Unit
µs/V
mV
µA
V
V