P89LPC9408FBD,557 NXP Semiconductors, P89LPC9408FBD,557 Datasheet - Page 51

IC 80C51 MCU FLASH 8K 64-LQFP

P89LPC9408FBD,557

Manufacturer Part Number
P89LPC9408FBD,557
Description
IC 80C51 MCU FLASH 8K 64-LQFP
Manufacturer
NXP Semiconductors
Series
LPC900r
Datasheet

Specifications of P89LPC9408FBD,557

Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
64-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
18MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, LED, POR, PWM, WDT
Number Of I /o
23
Eeprom Size
512 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89LPC9x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
18 MHz
Number Of Programmable I/os
23
Number Of Timers
2
Operating Supply Voltage
2.4 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
OM10097 - KIT FOR LCD DEMO LPC9408EPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-3228
935280583557
P89LPC9408FBD

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P89LPC9408FBD,557
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
P89LPC9408_1
Product data sheet
8.4.1 Fixed channel, single conversion mode
8.4.2 Fixed channel, continuous conversion mode
8.4.3 Auto scan, single conversion mode
8.4.4 Auto scan, continuous conversion mode
8.4.5 Dual channel, continuous conversion mode
8.4 ADC operating modes
A single input channel can be selected for conversion. A single conversion will be
performed and the result placed in the result register pair which corresponds to the
selected input channel. An interrupt, if enabled, will be generated after the conversion
completes.
A single input channel can be selected for continuous conversion. The results of the
conversions will be sequentially placed in the eight result register pairs. The user may
select whether an interrupt can be generated after every four or every eight conversions.
Additional conversion results will again cycle through the result register pairs, overwriting
the previous results. Continuous conversions continue until terminated by the user.
Any combination of the eight input channels can be selected for conversion. A single
conversion of each selected input will be performed and the result placed in the result
register pair which corresponds to the selected input channel. The user may select
whether an interrupt, if enabled, will be generated after either the first four conversions
have occurred or all selected channels have been converted. If the user selects to
generate an interrupt after the four input channels have been converted, a second
interrupt will be generated after the remaining input channels have been converted. If only
a single channel is selected this is equivalent to single channel, single conversion mode.
Any combination of the eight input channels can be selected for conversion. A conversion
of each selected input will be performed and the result placed in the result register pair
which corresponds to the selected input channel. The user may select whether an
interrupt, if enabled, will be generated after either the first four conversions have occurred
or all selected channels have been converted. If the user selects to generate an interrupt
after the four input channels have been converted, a second interrupt will be generated
after the remaining input channels have been converted. After all selected channels have
been converted, the process will repeat starting with the first selected channel. Additional
conversion results will again cycle through the eight result register pairs, overwriting the
previous results. Continuous conversions continue until terminated by the user.
This is a variation of the auto scan continuous conversion mode where conversion occurs
on two user-selectable inputs. The result of the conversion of the first channel is placed in
the result register pair, AD0DAT0R and AD0DAT0L. The result of the conversion of the
second channel is placed in result register pair, AD0DAT1R and AD0DAT1L. The first
channel is again converted and its result stored in AD0DAT2R and AD0DAT2L. The
second channel is again converted and its result placed in AD0DAT3R and AD0DAT3L,
etc. An interrupt is generated, if enabled, after every set of four or eight conversions (user
selectable).
8-bit two-clock 80C51 core with 32 segment
Rev. 01 — 16 December 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
P89LPC9408
4 LCD driver, 10-bit ADC
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