p89lpc9408 NXP Semiconductors, p89lpc9408 Datasheet
p89lpc9408
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p89lpc9408 Summary of contents
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... Rev. 01 — 16 December 2005 1. General description The P89LPC9408 is a multi-chip module consisting of a P89LPC938 single-chip microcontroller combined with a PCF8576D universal LCD controller in a low-cost 64-pin package. The LCD controller provides 32 segments and supports from backplanes. Display overhead is minimized by an on-chip display RAM with auto-increment addressing ...
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... Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns minimum ramp times. Only power and ground connections are required to operate the P89LPC9408 when internal reset option is selected. Four interrupt priority levels. Eight keypad interrupt inputs, plus two additional external interrupt inputs. ...
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... LQFP64 plastic low profile quad flat package; 64 leads; body 14 Part options Flash memory 8 kB P89LPC938 MCU SCL, SDA SCL_LCD, SDA_LCD Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC 14 1.4 mm Temperature range Frequency + MHz to 18 MHz S[31:0] BP[3:0] PCF8576D ...
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... DATA RAM 512-BYTE 512-BYTE DATA EEPROM PORT 3 PORT 2 PORT 1 PORT 0 KEYPAD INTERRUPT CPU clock ON-CHIP RC OSCILLATOR OSCILLATOR Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC TXD UART RXD SCL 2 I C-BUS SDA SPICLK MOSI SPI MISO SS REAL-TIME CLOCK/ SYSTEM TIMER ...
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... SCL INPUT FILTERS SDA Fig 3. LCD display controller block diagram 5. Functional diagram AD05 AD00 AD01 AD02 AD03 Fig 4. P89LPC9408 functional diagram P89LPC9408_1 Product data sheet 8-bit two-clock 80C51 core with 32 segment BP0 BP1 BP2 BP3 BACKPLANE OUTPUTS LCD VOLTAGE SELECTOR BLINKER ...
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... All pins have Schmitt trigger inputs. Port 0 also provides various special functions as described below: Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC P89LPC9408 002aab777 Section 7.13.1 “Port for details. © Koninklijke Philips Electronics N.V. 2005. All rights reserved. ...
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... TXD — Transmitter output for the serial port. P1.1 — Port 1 bit 1. RXD — Receiver input for the serial port. Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC Section 7.13.1 “Port for details. P1.2 and P1.3 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. ...
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... MOSI — SPI master out slave in. When configured as master, this pin is output; when configured as slave, this pin is input. P2.3 — Port 2 bit 3. MISO — When configured as master, this pin is input, when configured as slave, this pin is output. Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC falls DD Section 7.13.1 “Port for details. ...
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... Power supply: This is the power supply voltage for normal operation as well as Idle and Power-down modes. LCD power supply: LCD supply voltage. Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC Section 7.13.1 “Port for details. © Koninklijke Philips Electronics N.V. 2005. All rights reserved. ...
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... Philips Semiconductors 7. Functional description Remark: Please refer to the P89LPC9408 User manual for a more detailed functional description. 7.1 Special function registers Remark: SFR accesses are restricted in the following ways: • User must not attempt to access any SFR locations not defined. • Accesses to any defined SFR locations must be strictly for the functions for the SFRs. ...
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Table 4: Special function registers * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB Bit address E7 ACC* Accumulator E0H AD0CON ADC0 control 97H ENBI0 register AD0INS ADC0 input select A3H ADI07 AD0MODA ...
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Table 4: Special function registers …continued * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB DEEDAT Data EEPROM data F2H register DEEADR Data EEPROM F3H address register DIVM CPU clock 95H divide-by-M control ...
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Table 4: Special function registers …continued * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB ICRAL Input capture A AAH register low ICRBH Input capture B AFH register high ICRBL Input capture B ...
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Table 4: Special function registers …continued * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB OCRBH Output compare B FBH register high OCRBL Output compare B FAH register low OCRCH Output compare C ...
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Table 4: Special function registers …continued * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB P3M1 Port 3 output B1H - mode 1 P3M2 Port 3 output B2H - mode 2 PCON Power ...
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Table 4: Special function registers …continued * indicates SFRs that are bit addressable. Name Description SFR Bit functions and addresses addr. MSB TAMOD Timer 0 and 1 8FH - auxiliary mode Bit address 8F TCON* Timer 0 and 1 88H ...
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... All ports are in input only (high-impedance) state after power-up. [3] The RSTSRC register reflects the cause of the P89LPC9408 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the power-on reset value is xx11 0000. [4] The only reset source that affects these SFRs is power-on reset. ...
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Table 5: P89LPC938 extended special function registers Name Description ADC0HBND ADC0 high _boundary register, left (MSB) ADC0LBND ADC0 low_boundary register (MSB) AD0DAT0R ADC0 data register 0, right (LSB) AD0DAT0L ADC0 data register 0, left (MSB) AD0DAT1R ADC0 data register 1, ...
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... Philips Semiconductors 7.2 Enhanced CPU The P89LPC9408 uses an enhanced 80C51 CPU which runs at six times the speed of standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and most instructions execute in one or two machine cycles. 7.3 Clocks 7.3.1 Clock definitions The P89LPC9408 device has several internal clocks as defined below: OSCCLK — ...
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... Idle mode, it may be turned off prior to entering idle, saving additional power. 7.4 On-chip RC oscillator option The P89LPC9408 has a 6-bit TRIM register that can be used to tune the frequency of the RC oscillator. During reset, the TRIM value is initialized to a factory preprogrammed value to adjust the oscillator frequency to 7.373 MHz applications can write to the TRIM register to adjust the on-chip RC oscillator to other frequencies ...
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... Low power select The P89LPC9408 is designed to run at 18 MHz (CCLK) maximum. However, if CCLK is 8 MHz or slower, the CLKLP SFR bit (AUXR1.7) can be set to logic 1 to lower the power consumption further. On any reset, CLKLP is logic 0 allowing highest performance access ...
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... IDATA XDATA 7.12 Interrupts The P89LPC9408 uses a four priority level interrupt structure. This allows great flexibility in controlling the handling of the many interrupt sources. The P89LPC9408 supports 16 interrupt sources: external interrupts 0 and 1, timers 0 and 1, serial port TX, serial port RX, combined serial port RX/TX, brownout detect, watchdog/RTC, I comparators 1 and 2, SPI, CCU, data EEPROM write, and ADC completion ...
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... LOW in the next cycle, the interrupt request flag IEn in TCON is set, causing an interrupt request external interrupt is enabled when the P89LPC9408 is put into Power-down or Idle mode, the interrupt will cause the processor to wake-up and resume operation. Refer to Section 7.15 “Power reduction modes” ...
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... Fig 7. Interrupt sources, interrupt enables, and power-down wake-up sources 7.13 I/O ports The P89LPC9408 has four I/O ports: Port 0 and Port 1 are 8-bit ports. Port 5-bit port. Port 2-bit port. The exact number of I/O pins available depends upon the clock and reset options chosen, as shown in ...
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... Required for operation above 12 MHz. 7.13.1 Port configurations All but three I/O port pins on the P89LPC9408 may be configured by software to one of four types on a bit-by-bit basis. These are: quasi-bidirectional (standard 80C51 port outputs), push-pull, open drain, and input-only. Two configuration registers for each port select the output type for each port pin. 1. P1.5 (RST) can only be an input and cannot be confi ...
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... Pin P1.5 is input only. Pins P1.2 and P1.3 and are configurable for either input-only or open-drain. Every output on the P89LPC9408 has been designed to sink typical LED drive current. However, there is a maximum total output current for all ports which must not be exceeded. Please refer to specifi ...
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... Brownout detect can work. The POF flag in the RSTSRC register is set to indicate an initial power-up condition. The POF flag will remain set until cleared by software. 7.15 Power reduction modes The P89LPC9408 supports three different power reduction modes. These modes are Idle mode, Power-down mode, and total Power-down mode. 7.15.1 Idle mode Idle mode leaves peripherals running in order to allow them to activate the processor when an interrupt is generated ...
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... For any other reset, previously set flag bits that have not been cleared will remain set. 7.16.1 Reset vector Following reset, the P89LPC9408 will fetch instructions from either address 0000H or the Boot address. The Boot address is formed by using the Boot Vector as the high byte of the address and the low byte of the address = 00H ...
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... RTC/system timer The P89LPC9408 has a simple RTC that allows a user to continue running an accurate timer while the rest of the device is powered-down. The RTC can be a wake- interrupt source. The RTC is a 23-bit down counter comprised of a 7-bit prescaler and a 16-bit loadable down counter. When it reaches all logic 0s, the counter will be reloaded again and the RTCF fl ...
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... PWM mode is used for PWM waveform generation. P89LPC9408_1 Product data sheet 8-bit two-clock 80C51 core with 32 segment Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... TOR2 compare value timer value 0x0000 non-inverted inverted TOR2 compare value timer value 0 non-inverted inverted Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC 002aaa893 002aaa894 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Product data sheet 8-bit two-clock 80C51 core with 32 segment Equation 1. PLCK = ----------------- - Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC TOR2 COMPARE VALUE A (or C) COMPARE VALUE B (or D) TIMER VALUE 0 PWM OUTPUT (OCA or OCC) PWM OUTPUT (OCB or OCD) 002aaa895 PCLK © Koninklijke Philips Electronics N.V. 2005. All rights reserved. ...
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... TOCF2D (TIFR2.6) Fig 11. CCU interrupts 7.20 UART The P89LPC9408 has an enhanced UART that is compatible with the conventional 80C51 UART except that Timer 2 overflow cannot be used as a baud rate source. The P89LPC9408 does include an independent Baud Rate Generator. The baud rate can be selected from the oscillator (divided by a constant), Timer 1 overfl ...
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... Section 7.20.5 “Baud rate generator and 7.20.5 Baud rate generator and selection The P89LPC9408 enhanced UART has an independent Baud Rate Generator. The baud rate is determined by a baud rate preprogrammed into the BRGR1 and BRGR0 SFRs which together form a 16-bit baud rate divisor value that works in a similar manner as Timer 1 but is much more accurate ...
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... C-bus may be used for test and diagnostic purposes. 2 C-bus configuration is shown in 2 C-bus interface that supports data transfers up to 400 kHz. Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC Figure 13. The P89LPC9408 device provides a © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... P89LPC9408_1 Product data sheet 8-bit two-clock 80C51 core with 32 segment 2 I C-bus P1.3/SDA P1.2/SCL MCU 2 C-bus configuration Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC OTHER DEVICE OTHER DEVICE 2 2 WITH I C-BUS WITH I C-BUS INTERFACE INTERFACE 002aab410 © ...
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... STAGE INPUT FILTER OUTPUT STAGE timer 1 overflow I2CON P1.2 I2SCLH I2SCLL status bus I2STAT 2 C-bus serial interface block diagram - P89LPC9408 Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC 8 I2ADR ADDRESS REGISTER COMPARATOR SHIFT REGISTER ACK I2DAT 8 BIT COUNTER / ARBITRATION & CCLK ...
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... Philips Semiconductors 7.22 SPI The P89LPC9408 provides another high-speed serial communication interface—the SPI interface. SPI is a full-duplex, high-speed, synchronous communication bus with two operation modes: Master mode and Slave mode 4.5 Mbit/s can be supported in Master mode Mbit/s in Slave mode. It has a transfer completion flag and write collision fl ...
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... REGISTER SPICLK SPI CLOCK SS/PORT GENERATOR master MISO 8-BIT SHIFT MOSI REGISTER SPICLK SPI CLOCK SS/PORT GENERATOR Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC slave MISO 8-BIT SHIFT MOSI REGISTER SPICLK SS/PORT 002aab467 slave MISO 8-BIT SHIFT MOSI REGISTER ...
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... Fig 18. SPI single master multiple slaves configuration 7.23 Analog comparators Two analog comparators are provided on the P89LPC9408. Input and output options allow use of the comparators in a number of different configurations. Comparator operation is such that the output is a logic 1 (which may be read in a register and/or routed to a pin) when the positive input (one of two selectable pins) is greater than the negative input (selectable from a pin or an internal reference voltage) ...
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... CP1 OE1 comparator 1 CO1 change detect CMF1 CN1 change detect CP2 CMF2 comparator 2 CO2 OE2 CN2 10 %. Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC CMP1 (P0.6) interrupt EC CMP2 (P0.0) 002aaa904 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Feeding the watchdog requires a two-byte sequence. If PCLK is selected as the watchdog clock and the CPU is powered-down, the watchdog is disabled. The watchdog timer has a time-out period that ranges from a few few seconds. Please refer to the P89LPC9408 User manual for more details. P89LPC9408_1 Product data sheet ...
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... LCD controller 7.27.1 General description The LCD segment driver in the P89LPC9408 can interface to most LCDs using low multiplex rates. It generates the drive signals for static or multiplexed LCDs containing up to four backplanes and segments. The LCD controller communicates to a host using the I LCD controller are available on the P89LPC9408 providing system fl ...
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... SS LCD 7-Segments Numeric Digits Indicator Symbols /24. CLK Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC 8. All of these configurations can be implemented 2 14- Segments Alphanumeric Characters Indicator Symbols and V . The LCD voltage can be temperature ...
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... P89LPC9408_1 Product data sheet 8-bit two-clock 80C51 core with 32 segment 4-bit RAM which stores LCD data. There is a one-to-one Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC Table 9. © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Data EEPROM The P89LPC9408 has 512 bytes of on-chip Data EEPROM. The Data EEPROM is SFR based, byte readable, byte writable, and erasable (via row fill and sector fill). The user can read, write and fill the memory via SFRs and one interrupt. This Data EEPROM provides 100,000 minimum erase/program cycles for each byte. • ...
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... Flash organization The program memory consists of eight 1 kB sectors on the P89LPC9408 device. Each sector can be further divided into 64-byte pages. In addition to sector erase, page erase, and byte erase, a 64-byte page register is included which allows from bytes of a given page to be programmed at the same time, substantially reducing overall programming time ...
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... ISP is performed without removing the microcontroller from the system. The ISP facility consists of a series of internal hardware resources coupled with internal firmware to facilitate remote programming of the P89LPC9408 through the serial port. This firmware is provided by Philips and embedded within each P89LPC9408 device. The Philips ISP facility has made ISP in an embedded application possible with a minimum of additional expense in components and circuit board area. The ISP function uses fi ...
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... Some user-configurable features of the P89LPC9408 must be defined at power-up and therefore cannot be set by the program after start of execution. These features are configured through the use of the flash byte UCFG1. Please see the P89LPC9408 User manual for additional details. 7.31 User sector security bytes There are eight User Sector Security Bytes on the P89LPC9408 device ...
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... Philips Semiconductors 8. ADC 8.1 General description The P89LPC9408 has a 10-bit, 8-channel multiplexed successive approximation analog-to-digital converter module. A block diagram of the ADC is shown in The ADC consists of an 8-input multiplexer which feeds a sample-and-hold circuit providing an input signal to one of two comparator inputs. The control logic in combination with the SAR drives a digital-to-analog converter which provides the other input to the comparator ...
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... AD0DAT3R and AD0DAT3L, etc. An interrupt is generated, if enabled, after every set of four or eight conversions (user selectable). P89LPC9408_1 Product data sheet 8-bit two-clock 80C51 core with 32 segment Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Power-down mode or Total Power-down mode, the ADC does not function. If the ADC is enabled, it will consume power. Power can be reduced by disabling the ADC. P89LPC9408_1 Product data sheet 8-bit two-clock 80C51 core with 32 segment Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... V; 18 MHz voltage comparators powered down 3 3 except SCL, SDA SCL, SDA only except SCL, SDA SCL, SDA only port 1 Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC Min Max 55 +125 65 +150 - 100 - 3.5 - 1.5 [1] Min ...
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... 1 3 2.4 V < V < 3.6 V; with DD BOE = 1, BOPD = 0 specifications are measured using an external clock with the following functions disabled: comparators, for steady state (non-transient) limits on I Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC [1] Min Typ [4] - 0.6 [4] - 0.2 V 0.3 V ...
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... Figure 22 see Figure 22 see Figure 22 see Figure 24, 25, 26, 27 see Figure 26, 27 see Figure 26, 27 Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC [1] [2] Variable clock MHz Unit osc Min Max Min 7.189 7.557 7.189 320 520 320 ...
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... Figure 24, 25, 26, 27 see Figure 24, 25, 26, 27 see Figure 24, 25, 26, 27 see Figure 24, 25, 26, 27 Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC [1] [2] Variable clock MHz Unit osc Min Max Min 2 - 165 CCLK 3 - 250 CCLK 2 - 165 CCLK ...
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... Figure 22 see Figure 22 see Figure 22 see Figure 24, 25, 26, 27 see Figure 26, 27 see Figure 26, 27 Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC [1] [2] Variable clock MHz Unit osc Min Max Min 7.189 7.557 7.189 320 520 320 ...
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... Figure 24, 25, 26, 27 see Figure 24, 25, 26, 27 see Figure 24, 25, 26, 27 see Figure 24, 25, 26, 27 Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC [1] [2] Variable clock MHz Unit osc Min Max Min 2 - 111 CCLK 3 - 167 CCLK 2 - 111 CCLK ...
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... XHQX XHDX valid valid valid valid 0 0 CHCL CLCX Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC set TI valid valid valid valid set RI 002aaa906 t CHCX t CLCH T cy(clk) 002aaa907 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. ...
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... SPIF SPIR t SPICLKL t SPICLKH t t SPIDSU SPIDH MSB/LSB SPIDV SPIOH master MSB/LSB out Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC SPIR LSB/MSB SPIDV SPIR master LSB/MSB out 002aaa908 LSB/MSB SPIDV SPIDV t SPIR master LSB/MSB out 002aaa909 © ...
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... SPIF SPIR t SPICLKL t SPICLKH t SPIR t SPICLKL t SPICLKH t SPIOH t SPIDV slave MSB/LSB out t t SPIDSU SPIDH MSB/LSB in Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC t SPIR t SPILAG t SPIOH slave LSB/MSB out not defined t t SPIDSU SPIDH LSB/MSB in 002aaa910 t SPIR t SPILAG t SPIOH t ...
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... This parameter is characterized, but not tested in production. P89LPC9408_1 Product data sheet 8-bit two-clock 80C51 core with 32 segment Conditions Conditions 0 V < V < Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC Min Typ Max 002aaa912 Min Typ ...
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... T ADC clock cycle time cy(ADC) t ADC conversion time ADC P89LPC9408_1 Product data sheet 8-bit two-clock 80C51 core with 32 segment Conditions 0 kHz to 100 kHz ADC enabled Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC Min Typ Max ...
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... 0.45 0.20 14.1 14.1 16.15 16.15 0.8 0.30 0.09 13.9 13.9 15.85 15.85 REFERENCES JEDEC JEITA MS-026 ED-7311EC Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC detail 0.75 1.2 1 0.2 0.2 0.1 0.45 0.8 EUROPEAN PROJECTION © Koninklijke Philips Electronics N.V. 2005. All rights reserved. ...
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... In-System Programming Liquid Crystal Display Light Emitting Diode Pulse Width Modulator Random Access Memory Resistance-Capacitance Special Function Register Serial Peripheral Interface Universal Asynchronous Receiver/Transmitter Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... P89LPC9408_1 20051216 P89LPC9408_1 Product data sheet 8-bit two-clock 80C51 core with 32 segment Data sheet status Change notice Product data sheet - Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC Doc. number Supersedes - - © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Notice — All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of Koninklijke Philips Electronics N.V. Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
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... Rev. 01 — 16 December 2005 P89LPC9408 4 LCD driver, 10-bit ADC Reset vector . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Timers/counters 0 and Mode Mode Mode Mode Mode Timer overflow toggle output . . . . . . . . . . . . . 29 RTC/system timer CCU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 CCU Clock (CCUCLK CCU clock prescaling . . . . . . . . . . . . . . . . . . . 30 Basic timer operation . . . . . . . . . . . . . . . . . . . 30 Output compare ...
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... No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Published in the Netherlands P89LPC9408 4 LCD driver, 10-bit ADC Comparator electrical characteristics . . . . . . . 62 Date of release: 16 December 2005 Document number: P89LPC9408_1 ...