AT32UC3A0512-ALTTA Atmel, AT32UC3A0512-ALTTA Datasheet - Page 272

IC MCU AVR32 512K FLASH 144LQFP

AT32UC3A0512-ALTTA

Manufacturer Part Number
AT32UC3A0512-ALTTA
Description
IC MCU AVR32 512K FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet

Specifications of AT32UC3A0512-ALTTA

Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
109
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A0512-ALTTA
Manufacturer:
Atmel
Quantity:
10 000
25.7.8
25.7.9
32058J-AVR32-04/11
Loop Mode
Interrupt
Figure 25-14. Transmit Frame Format in Continuous Mode
Note:
Figure 25-15. Receive Frame Format in Continuous Mode
Note:
The receiver can be programmed to receive transmissions from the transmitter. This is done by
setting the Loop Mode (LOOP) bit in RFMR. In this case, RX_DATA is connected to TX_DATA,
RX_FRAME_SYNC is connected to TX_FRAME_SYNC and RX_CLOCK is connected to
TX_CLOCK.
Most bits in SR have a corresponding bit in interrupt management registers.
The SSC can be programmed to generate an interrupt when it detects an event. The interrupt is
controlled by writing IER (Interrupt Enable Register) and IDR (Interrupt Disable Register) These
registers enable and disable, respectively, the corresponding interrupt by setting and clearing
the corresponding bit in IMR (Interrupt Mask Register), which controls the generation of inter-
rupts by asserting the SSC interrupt line connected to the interrupt controller.
1. STTDLY is set to 0. In this example, THR is loaded twice. FSDEN value has no effect on the
1. STTDLY is set to 0.
transmission. SyncData cannot be output in continuous mode.
TX_DATA
Start: 1. TXEMPTY set to 1
RX_DATA
2. Write into the THR
Start
From THR
DATLEN
Start = Enable Receiver
Data
DATLEN
To RHR
Data
From THR
DATLEN
Data
DATLEN
To RHR
Data
Default
AT32UC3A
272

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