AT32UC3A0512-ALTTA Atmel, AT32UC3A0512-ALTTA Datasheet - Page 171

IC MCU AVR32 512K FLASH 144LQFP

AT32UC3A0512-ALTTA

Manufacturer Part Number
AT32UC3A0512-ALTTA
Description
IC MCU AVR32 512K FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet

Specifications of AT32UC3A0512-ALTTA

Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
109
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A0512-ALTTA
Manufacturer:
Atmel
Quantity:
10 000
22.3.2
22.3.3
22.4
22.4.1
32058J–AVR32–04/11
Functional Description
Interrupt Lines
Power and Clock Management
Pull-up Resistor Control
The GPIO interrupt lines are connected to the interrupt controller. Using the GPIO interrupt
requires the interrupt controller to be programmed first.
The clock for the GPIO is controlled by the power manager. The programmer must ensure that
the GPIO clock is enabled in the power manager before using the GPIO. The clock must be
enabled in order to access the configuration registers of the GPIO and when interrupts are
enabled. After configuring the GPIO, the clock can be disabled if interrupts are not enabled.
The GPIO controls the I/O lines of the microcontroller. The control logic associated with each pin
is represented in the figure below:
Figure 22-1. Overview of the GPIO pad connections
Each I/O line is designed with an embedded pull-up resistor. The pull-up resistor can be enabled
or disabled by accessing the corresponding bit in PUER (Pull-up Enable Register). Control of the
pull-up resistor is possible whether an I/O line is controlled by a peripheral or the GPIO.
Number of I/O pins.
Functions implemented on each pin.
Peripheral function(s) multiplexed on each I/O pin.
Reset state of registers.
Periph. A output enable
Periph. B output enable
Periph. C output enable
Periph. D output enable
Periph. A output data
Periph. B output data
Periph. C output data
Periph. D output data
Periph. C input data
Periph. D input data
Periph. A input data
Periph. B input data
GPIO_PMR1
GPIO_PMR0
GPIO_ODER
GPIO_OVR
GPIO_GPER
GPIO_PVR
Glitch Filter
GPIO_GFER
1
0
0
1
0
1
Edge Detector
GPIO_IMR1
GPIO_IMR0
GPIO_ODMER
GPIO_IER
0
1
0
1
1
0
GPIO_PUER
AT32UC3A
Interrupt Request
PAD
171

Related parts for AT32UC3A0512-ALTTA