AT91SAM7SE32-AU Atmel, AT91SAM7SE32-AU Datasheet - Page 422

• Manufacturer Part Number: AT91SAM7SE32-AU
• Description: MCU ARM 32K HS FLASH 128-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7SE32-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: EBI/EMI, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 88
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-LQFP
• Controller Family/series: AT91SAM7xxxx
• No. Of I/o's: 88
• Ram Memory Size: 8KB
• Cpu Speed: 48MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: EBI, SPI, TWI, USART
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 88
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7SE-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: AT91SAM7SE-EK - EVAL BOARD FOR AT91SAM7SEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

34.6.3.3
422
AT91SAM7SE512/256/32 Preliminary
Synchronous Receiver
The number of data bits, first bit sent and parity mode are selected by the same fields and bits
as the transmitter, i.e. respectively CHRL, MODE9, MSBF and PAR. For the synchronization
mechanism only, the number of stop bits has no effect on the receiver as it considers only one
stop bit, regardless of the field NBSTOP, so that resynchronization between the receiver and the
transmitter can occur. Moreover, as soon as the stop bit is sampled, the receiver starts looking
for a new start bit so that resynchronization can also be accomplished when the transmitter is
operating with one stop bit.
Figure 34-8
operates in asynchronous mode.
Figure 34-8. Asynchronous Start Detection
Figure 34-9. Asynchronous Character Reception
In synchronous mode (SYNC = 1), the receiver samples the RXD signal on each rising edge of
the Baud Rate Clock. If a low level is detected, it is considered as a start. All data bits, the parity
bit and the stop bits are sampled and the receiver waits for the next start bit. Synchronous mode
operations provide a high speed transfer capability.
Configuration fields and bits are the same as in asynchronous mode.
Clock (x16)
Baud Rate
Sampling
Sampling
Sampling
Baud Rate
Example: 8-bit, Parity Enabled
Detection
Clock
RXD
RXD
Start
Clock
RXD
and
1
1
Figure 34-9
2
2
samples
3
3
16
4
4
D0
5
5
samples
illustrate start detection and character reception when USART
16
6
6
D1
7
Detection
7
Rejection
samples
Start
Start
16
8
0
D2
1
1
samples
16
2
2
3
3
D3
samples
4
4
16
5
D4
samples
6
16
7
D5
samples
8
16
9 10 11 12 13 14 15 16
D6
samples
16
D7
samples
16
6222B–ATARM–26-Mar-07
Parity
Bit
samples
16
Stop
Bit
Sampling
D0