AT91SAM7SE32-AU Atmel, AT91SAM7SE32-AU Datasheet - Page 382

• Manufacturer Part Number: AT91SAM7SE32-AU
• Description: MCU ARM 32K HS FLASH 128-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7SE32-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: EBI/EMI, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 88
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-LQFP
• Controller Family/series: AT91SAM7xxxx
• No. Of I/o's: 88
• Ram Memory Size: 8KB
• Cpu Speed: 48MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: EBI, SPI, TWI, USART
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 88
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7SE-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: AT91SAM7SE-EK - EVAL BOARD FOR AT91SAM7SEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Figure 33-8. Master Read with One, Two or Three Bytes Internal Address and One Data Byte
Figure 33-9. Master Read with One Byte Internal Address and Multiple Data Bytes
382
TWD
TWD
TWD
TXCOMP
RXRDY
TWD
Three bytes internal address
Two bytes internal address
One byte internal address
S
S
S
AT91SAM7SE512/256/32 Preliminary
S
Write START Bit
DADR
DADR
DADR
DADR
W
W
W
Figure 33-10. Internal Address Usage
W
A
A
A
A
IADR(23:16)
IADR(15:8)
IADR(7:0)
IADR(7:0)
R
S
T
A
T
M
S
B
Address
Device
A
A
A
A
0
IADR(15:8)
IADR(7:0)
S
S
B
L
S
W
W
R
T
E
R
I
/
DADR
C
A
K
WORD ADDRESS
M
S
B
DADR
FIRST
A
A
R
IADR(7:0)
S
A
R
A
C
K
WORD ADDRESS
DADR
SECOND
A
DATA
A
DATA
L
S
B
S
R
C
A
K
Read RHR
DATA
A
N
DADR
DATA
A
P
Write STOP Bit
DATA
DATA
C
A
K
6222B–ATARM–26-Mar-07
O
S
T
P
R
N
Read RHR
N
P
N
A
P
P